From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 07D951D5AD4 for ; Fri, 6 Mar 2026 00:56:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772758587; cv=none; b=hmeYKl6XBG+QA9YGbrIolo2Aiua6l9CpWBfPhTSB5EA0I1C/FlEND95t6FF7lDrPO1yc4DexgH34o0nQ7GtXh9Nty08Qa7bV3viBCUU7TqaDJRANljw0v8R8F5K5PoKif6Gsxha1d65UyG6D2gzxM7RZT4OuZQDuaoLnLyPw0wc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772758587; c=relaxed/simple; bh=wbB/bZNonOzSTidDdrs4gMkjSo2K6BoIbieChhS7IE4=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=g7r3kkCLvEyZ0yIWYUGQBErpuP9cg/lkHaqt8+3x94mrnSoWR3B86+n87dha4k2E1D+CXQOvI2G/bh6kVp3kpSMYPbcTr59d5DAv54SKcRlmp1Kp12U4sD2ONzFW9hHVyD14taoKvdkMsxDIqROBGu7BGmeVyXOXFaTDr7NncRU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=oDmvcDqo; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="oDmvcDqo" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772758586; x=1804294586; h=date:from:to:subject:message-id:references:mime-version: in-reply-to; bh=wbB/bZNonOzSTidDdrs4gMkjSo2K6BoIbieChhS7IE4=; b=oDmvcDqoB1QGW1Dor2oagI7Ia1H8isUJJREHp6vDFnZ4Q8eIP6lZF9OY sWAnVs5xMqOTaQYsetQtpPOKLypNU+WXeHjvH+0gkIul6ZyxyRSU3ZDn9 gXu6DcCRybhhhxVsQT16SFyA83iXq3uDgKmor/yZ+LYN1P/qjrf4hpyM5 moYdLXJmat25hx7QApThwfxj18IdQGIkS5ge0g44PeyOfN4WiqJmxMted KJrsLlPmY5lRV0e8SNVmmfUOjyL//r1x/Nlb2Bpc/0Lj73XBJZVLgF5gs HPUBh4ltC+IILaYrkVhVpaUcJ8Xan/VvLC7xA6R5XhKGDIj4ug8QWpJfb g==; X-CSE-ConnectionGUID: Ko89187NQwiyLc1WqjXTJQ== X-CSE-MsgGUID: G7PdQGfoSkqyc9tZmnUm7g== X-IronPort-AV: E=McAfee;i="6800,10657,11720"; a="74050874" X-IronPort-AV: E=Sophos;i="6.23,104,1770624000"; d="scan'208";a="74050874" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2026 16:56:26 -0800 X-CSE-ConnectionGUID: B/eTDoIcTHmbgF41YSx1cw== X-CSE-MsgGUID: zcHGoLlzRwyYno4U8TW6vg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,104,1770624000"; d="scan'208";a="215589033" Received: from guptapa-desk.jf.intel.com (HELO desk) ([10.165.239.46]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2026 16:56:25 -0800 Date: Thu, 5 Mar 2026 16:56:19 -0800 From: Pawan Gupta To: linux-kernel@vger.kernel.org, sohil.mehta@intel.com, zhao1.liu@intel.com, Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Jon Kohler , "Peter Zijlstra (Intel)" , Thomas Gleixner , Tony Luck , x86@kernel.org Subject: Re: [PATCH v4 2/4] x86/cpu: Add platform ID to CPU info structure Message-ID: <20260306005619.4kmcdwhgpiqdzdnb@desk> References: <20260304181016.85EC87C7@davehans-spike.ostc.intel.com> <20260304181020.8D518228@davehans-spike.ostc.intel.com> <20260306004923.ln6ai2zl23gjsdov@desk> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260306004923.ln6ai2zl23gjsdov@desk> On Thu, Mar 05, 2026 at 04:49:29PM -0800, Pawan Gupta wrote: > On Wed, Mar 04, 2026 at 10:10:20AM -0800, Dave Hansen wrote: > > > > From: Dave Hansen > > > > The end goal here is to be able to do x86_match_cpu() and match on a > > specific platform ID. While it would be possible to stash this ID > > off somewhere or read it dynamically, that approaches would not be > > consistent with the other fields which can be matched. > > > > Read the platform ID and store it in cpuinfo_x86. > > > > There are lots of sites to set this new field. Place it near > > the place c->microcode is established since the platform ID is > > so closely intertwined with microcode updates. > > > > Note: This should not grow the size of 'struct cpuinfo_x86' in > > practice since the u8 fits next to another u8 in the structure. > > > > Signed-off-by: Dave Hansen > > Reviewed-by: Pawan Gupta Nevermind, this was already reviewed and merged.