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X-CSE-ConnectionGUID: dv5AKYtgSeeoFGlUfMtbtg== X-CSE-MsgGUID: aePt8r54Qeuqc4rrxUlndA== X-IronPort-AV: E=McAfee;i="6800,10657,11722"; a="74206763" X-IronPort-AV: E=Sophos;i="6.23,108,1770624000"; d="scan'208";a="74206763" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2026 04:39:31 -0700 X-CSE-ConnectionGUID: X8ztqWa7ReWfh1AJW0z57w== X-CSE-MsgGUID: BdqM3nuXQ+OqV6Y3uf6NNQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,108,1770624000"; d="scan'208";a="245562723" Received: from lkp-server01.sh.intel.com (HELO 058beb05654c) ([10.239.97.150]) by fmviesa001.fm.intel.com with ESMTP; 08 Mar 2026 04:39:28 -0700 Received: from kbuild by 058beb05654c with local (Exim 4.98.2) (envelope-from ) id 1vzCTm-0000000034u-1daU; Sun, 08 Mar 2026 11:39:26 +0000 Date: Sun, 08 Mar 2026 19:38:30 +0800 From: kernel test robot Cc: oe-kbuild-all@lists.linux.dev, linux-kernel@vger.kernel.org, Rodrigo Vivi , Balasubramani Vivekanandan Subject: arch/xtensa/include/asm/initialize_mmu.h:57: Error: invalid register 'atomctl' for 'wsr' instruction Message-ID: <202603081945.JhpM0yD4-lkp@intel.com> User-Agent: s-nail v14.9.25 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: c23719abc3308df7ed3ad35650ad211fb2d2003d commit: b67e7422d229dead0dddaad7e7c05558f24d552f drm/xe: Fix build with CONFIG_MODULES=n date: 6 months ago config: xtensa-randconfig-r053-20260308 (https://download.01.org/0day-ci/archive/20260308/202603081945.JhpM0yD4-lkp@intel.com/config) compiler: xtensa-linux-gcc (GCC) 11.5.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260308/202603081945.JhpM0yD4-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202603081945.JhpM0yD4-lkp@intel.com/ All errors (new ones prefixed by >>): arch/xtensa/include/asm/initialize_mmu.h: Assembler messages: >> arch/xtensa/include/asm/initialize_mmu.h:57: Error: invalid register 'atomctl' for 'wsr' instruction arch/xtensa/boot/boot-elf/bootstrap.S:58: Info: macro invoked from here arch/xtensa/boot/boot-elf/bootstrap.S:68: Warning: value 0x1a0003000 truncated to 0xa0003000 vim +57 arch/xtensa/include/asm/initialize_mmu.h c622b29d1f3802 Max Filippov 2012-11-19 40 c622b29d1f3802 Max Filippov 2012-11-19 41 .macro initialize_mmu c622b29d1f3802 Max Filippov 2012-11-19 42 c622b29d1f3802 Max Filippov 2012-11-19 43 #if XCHAL_HAVE_S32C1I && (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RC_2009_0) c622b29d1f3802 Max Filippov 2012-11-19 44 /* c622b29d1f3802 Max Filippov 2012-11-19 45 * We Have Atomic Operation Control (ATOMCTL) Register; Initialize it. 87670c577041dc Jonathan Corbet 2023-03-23 46 * For details see Documentation/arch/xtensa/atomctl.rst c622b29d1f3802 Max Filippov 2012-11-19 47 */ c622b29d1f3802 Max Filippov 2012-11-19 48 #if XCHAL_DCACHE_IS_COHERENT c622b29d1f3802 Max Filippov 2012-11-19 49 movi a3, 0x25 /* For SMP/MX -- internal for writeback, c622b29d1f3802 Max Filippov 2012-11-19 50 * RCW otherwise c622b29d1f3802 Max Filippov 2012-11-19 51 */ c622b29d1f3802 Max Filippov 2012-11-19 52 #else c622b29d1f3802 Max Filippov 2012-11-19 53 movi a3, 0x29 /* non-MX -- Most cores use Std Memory c622b29d1f3802 Max Filippov 2012-11-19 54 * Controlers which usually can't use RCW c622b29d1f3802 Max Filippov 2012-11-19 55 */ c622b29d1f3802 Max Filippov 2012-11-19 56 #endif c622b29d1f3802 Max Filippov 2012-11-19 @57 wsr a3, atomctl c622b29d1f3802 Max Filippov 2012-11-19 58 #endif /* XCHAL_HAVE_S32C1I && c622b29d1f3802 Max Filippov 2012-11-19 59 * (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RC_2009_0) c622b29d1f3802 Max Filippov 2012-11-19 60 */ c622b29d1f3802 Max Filippov 2012-11-19 61 :::::: The code at line 57 was first introduced by commit :::::: c622b29d1f38021411965b7e0170ab055551b257 xtensa: initialize atomctl SR :::::: TO: Max Filippov :::::: CC: Chris Zankel -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki