From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37CEE38B120; Thu, 12 Mar 2026 08:55:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773305745; cv=none; b=T7CBZ8KpC/mWCFPN/DE+y6oNu3Q5XQXIXLgAD+k6SDMvRQ1RzDrwZIusysy77feS0F7yUF9UFLSisipB/79h1HDKQb7Z6zSUhDzYUmJhRwI7LFmCP2AwuKdaAJOdS7a7lQxVgqQpY6kfI7AY70idmpgkt+tau8OLmpIPgwA7bHo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773305745; c=relaxed/simple; bh=EMOxhKQoxcuO3NkbIN3V9kch4tZl5HNrkaSiEfi9ajU=; h=From:Subject:Date:Message-Id:MIME-Version:Content-Type:To:Cc; b=ev1feRqtuzycWkZyPmtbuiScMWr9N7bNVuQvh6d61q0/b8U9leMllH9bC63hODk9jVV8wSyk6OJwRA8DyO0OSKvEYwSWqjhBLSjSrR+nVFaiK8yJhzDSNnWhDR407MAbUlOwy31iwXzn5IKa80U23wfvX2qyNAgT1YqpFcDI2iI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=O15Q21mf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="O15Q21mf" Received: by smtp.kernel.org (Postfix) with ESMTPS id D02A1C4CEF7; Thu, 12 Mar 2026 08:55:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773305744; bh=EMOxhKQoxcuO3NkbIN3V9kch4tZl5HNrkaSiEfi9ajU=; h=From:Subject:Date:To:Cc:Reply-To:From; b=O15Q21mf7/xHVazQh0CGNj+ysa1kDT38tzxX81se0lUzzVciQs3n7rZFGRaoSH03H Vf0Idv0LROToGyqK0DcrNGNjWVhPiO7aXa29Sxi2oKLl2Fh8P6ljXb0pJjGfVewkDI iwKDVTl12+K/Q93myqFrLarY5JWKIyNzXYwjseRxEJH2L4FPe+VEwcDezZpn3c+YZQ GHyFGmcRDAUnVT4yf5+14q77pM8dXVJ0oPBxmbEvxT11pbREu3+c93rz7wbBVhOisu 26g5k4qwcNrTVGGCVvfAy3sYL7ZbHm4rtc3rz//aNngSB89ptSRnGuBvFuX4/o6RGS F6SJByqlquSiw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C32CAFED2F1; Thu, 12 Mar 2026 08:55:44 +0000 (UTC) From: Jan Petrous via B4 Relay Subject: [PATCH v11 0/4] Support multi-channel IRQs in stmmac platform drivers Date: Thu, 12 Mar 2026 09:55:26 +0100 Message-Id: <20260312-dwmac_multi_irq-v11-0-09621ccb040b@oss.nxp.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAH5/smkC/4XSzU7DMAwA4FeZcqZT7PzvxHsgNCVpzCKxdbSjD E17d9IBWlEqcbQlf7ZsX9iQ+pwGtlldWJ/GPOTuUAKAhxWLO394SU1uS4IhRwXIXdN+7H3c7t9 fT3mb+7fGtZY0lxpjBFaqjn2ifL6RT88l3uXh1PWftw4jTNkfC2RljdDwRmil0QeeHJnHbhjWh /NxHbs9m7QRfwXNC1ELOAnBokPBW26gFsRcELUgihCjEoQhWacXBDkXbC3IIlgkLyRFQsJaUHc Bl2ZQk0BRO+cV+ShrQc8FVQu6CChVIGgNAI+1YOaCrgVTBLKURHDFCQsz2LsgFj5jtJPAyy5Dt AB+4ZpuJsDCNd23wEUi23KgWgD+DwG8GMYH0NoZ5YL6a1yv1y/FCvMwBQMAAA== To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, rmk+kernel@armlinux.org.uk, vladimir.oltean@nxp.com, boon.khai.ng@altera.com, "Jan Petrous (OSS)" , Conor Dooley X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773305743; l=4714; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=EMOxhKQoxcuO3NkbIN3V9kch4tZl5HNrkaSiEfi9ajU=; b=7/COq+q4Pe6BvSzBjtj/DTvG7gfDWC+Omejw8QXRLcPPouX/PsCVwT5gVokhPAcy/PAZ5mXVq ZxjQA43s7B7CNBj5nSTf1+9e3nIsc4k7czlsj4YWNX69B0QNPDDmbhL X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" Reply-To: jan.petrous@oss.nxp.com The stmmac core supports two interrupt modes, controlled by the flag STMMAC_FLAG_MULTI_MSI_EN: - When the flag is set, the driver uses multi-channel IRQ mode (Multi-IRQ). - Otherwise, a single IRQ line is requested (aka MAC-IRQ): static int stmmac_request_irq(struct net_device *dev) { /* Request the IRQ lines */ if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN) ret = stmmac_request_irq_multi_msi(dev); else ret = stmmac_request_irq_single(dev); } At present, only PCI drivers (Intel and Loongson) make use of the Multi-IRQ mode. This concept can be extended to DT-based embedded glue drivers (dwmac-xxx.c). This series adds support for reading per-channel IRQs from the DT node and reuses the existing STMMAC_FLAG_MULTI_MSI_EN flag to enable multi-IRQ operation in platform drivers. The final decision if Multi-IRQ gets enabled remains on glue driver to allow implementing any reguirements/limitions the focused platform needs. NXP S32G2/S32G3/S32R SoCs integrate the DWMAC IP with multi-channel interrupt support. The dwmac-s32.c driver change is provided as an example of enabling multi-IRQ mode for non-PCI drivers. Signed-off-by: Jan Petrous (OSS) --- Changes in v11: - Dropped not benefical patch 1 with FOREACH_MTL_QUEUE macro - Link to v10: https://lore.kernel.org/r/20260311-dwmac_multi_irq-v10-0-7ab1669759b5@oss.nxp.com Changes in v10: - Fixed yaml issue - Link to v9: https://lore.kernel.org/r/20260311-dwmac_multi_irq-v9-0-f0c03ef8d01f@oss.nxp.com Changes in v9: - Changed interrupt minItems from 11 to 1 to support backward compatibility and removed the 'Reviewed-by' accordingly for patch 4 - Link to v8: https://lore.kernel.org/r/20260309-dwmac_multi_irq-v8-0-f0cc5bc811a7@oss.nxp.com Changes in v8: - Rewritten queue irq getter, based on Russell's (ready-to-use) hint - Renamed s32_gmac_validate_multi_irq() to s32_gmac_setup_multi_irq() to better describe the functionality - Fixed typo in commit message for patch 5 - Renamed label in patch 5 to make it more descriptive - Link to v7: https://lore.kernel.org/r/20260226-dwmac_multi_irq-v7-0-f8fe3b945bb4@oss.nxp.com Changes in v7: - Optimized 2 similar loops on queue rx/tx irq reading - Swap the yaml and dts patches with hope it fix dt_binding_check failing - Link to v6: https://lore.kernel.org/r/20260225-dwmac_multi_irq-v6-0-245bf1d7110c@oss.nxp.com Changes in v6: - Added 2 mintainers which were not covered by 'b4 prep --auto-to-cc' but complained on patchwork check - Added helper macro for loop over queue-based arrays (inspired by AI review) - Added full validation on all channel IRQs - Link to v5: https://lore.kernel.org/r/20260223-dwmac_multi_irq-v5-0-8fc699a5fac4@oss.nxp.com Changes in v5: - fixed typo in "symetrical" - cleaned negative return value on platform_get_irq_byname_optional() in stmmac_get_platform_resources() - rebased on v7.0-rc1 - Link to v4: https://lore.kernel.org/r/20260128-dwmac_multi_irq-v4-0-82fa34fcf2f2@oss.nxp.com Changes in v4: - Fixed IRQ reading check - Made cleaner the IRQ validity (to get AI reviewer happy) - Fixed minItems of interrupts property in yaml - Link to v3: https://lore.kernel.org/r/20260123-dwmac_multi_irq-v3-0-cc53f2be8961@oss.nxp.com Changes in v3: - removed RFC prefix - rebased on v6.19-rc6 - fixed forgotten extra line setting to Multi-IRQ unconditionally - fixed yaml - Link to v2: https://lore.kernel.org/r/20260121-dwmac_multi_irq-v2-0-3b829230d071@oss.nxp.com Changes in v2: - Fixed incorrect buffer len for 'rx-queue-%d' property check - Added backward compatibility to not break old settings - Fixed DT example in yaml - Link to v1: https://lore.kernel.org/r/20251214-dwmac_multi_irq-v1-0-36562ab0e9f7@oss.nxp.com --- Jan Petrous (OSS) (4): net: stmmac: platform: read channels irq arm64: dts: s32: set Ethernet channel irqs dt-bindings: net: nxp,s32-dwmac: Declare per-queue interrupts stmmac: s32: enable support for Multi-IRQ mode .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 47 ++++++++++++++++-- arch/arm64/boot/dts/freescale/s32g2.dtsi | 26 ++++++++-- arch/arm64/boot/dts/freescale/s32g3.dtsi | 26 ++++++++-- drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c | 36 +++++++++++++- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 57 +++++++++++++++++++++- 5 files changed, 179 insertions(+), 13 deletions(-) --- base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f change-id: 20251209-dwmac_multi_irq-9d8f60462cc1 Best regards, -- Jan Petrous (OSS)