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From: Magnus Kalland <magnus@dolphinics.com>
To: dheerajkumar.srivastava@amd.com
Cc: dhsrivas@amd.com, iommu@lists.linux.dev, jonas@dolphinics.com,
	joro@8bytes.org, larsk@dolphinics.com,
	linux-kernel@vger.kernel.org, magnus@dolphinics.com,
	suravee.suthikulpanit@amd.com, torel@simula.no,
	vasant.hegde@amd.com
Subject: Re: [PATCH v3 0/3] iommu/amd: Invalidate IRT cache for DMA aliases
Date: Tue, 17 Mar 2026 11:58:22 +0100	[thread overview]
Message-ID: <20260317105822.420129-2-magnus@dolphinics.com> (raw)
In-Reply-To: <5de2362c-61e2-4287-8735-8fcbc8a1ab09@amd.com>

> I tested the patch with lockdep (CONFIG_PROVE_LOCKING=y) enabled and
> observed the following lockdep warnings in the kernel logs.

Thanks Dheeraj for the testing.

I believe we can make the dte_lock also a raw spinlock. What do you think?

I'll send a v4 addressing this lockdep issue and also with a fix for a
potential future lock-order inversion in iommu_flush_irt_and_complete.

Magnus

  reply	other threads:[~2026-03-17 10:58 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-06  9:22 Magnus Kalland
2026-03-06  9:22 ` [PATCH v3 1/3] iommu/amd: Use raw spinlock for interrupt remapping tables Magnus Kalland
2026-03-06  9:22 ` [PATCH v3 2/3] iommu/amd: Track PCIe DMA aliases in set_remap_table_entry_alias Magnus Kalland
2026-03-06  9:22 ` [PATCH v3 3/3] iommu/amd: Invalidate IRT cache for DMA aliases Magnus Kalland
2026-03-13  7:46 ` [PATCH v3 0/3] " Dheeraj Kumar Srivastava
2026-03-17 10:58   ` Magnus Kalland [this message]
  -- strict thread matches above, loose matches on Subject: below --
2026-02-25 20:23 Magnus Kalland

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