From: Devang Vyas <devangnayanbhai.vyas@amd.com>
To: <yazen.ghannam@amd.com>, <bp@alien8.de>, <tony.luck@intel.com>,
<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: Devang Vyas <devangnayanbhai.vyas@amd.com>,
Ramesh Garidapuri <ramesh.garidapuri@amd.com>
Subject: [PATCH v4] EDAC/amd64: Add support for family 19h, models 40h-4fh
Date: Wed, 18 Mar 2026 00:04:53 +0530 [thread overview]
Message-ID: <20260317183453.3556588-1-devangnayanbhai.vyas@amd.com> (raw)
Add support for Ryzen 6000 Zen3-based CPUs in the V3000
AMD Embedded SoC platform which uses ECC memory and would
need RAS handling of hardware errors.
Co-developed-by: Ramesh Garidapuri <ramesh.garidapuri@amd.com>
Signed-off-by: Ramesh Garidapuri <ramesh.garidapuri@amd.com>
Signed-off-by: Devang Vyas <devangnayanbhai.vyas@amd.com>
---
drivers/edac/amd64_edac.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 2391f3469961..6cf0b6d7b5ec 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3863,6 +3863,9 @@ static int per_family_init(struct amd64_pvt *pvt)
pvt->max_mcs = 8;
}
break;
+ case 0x40 ... 0x4f:
+ pvt->max_mcs = 4;
+ break;
case 0x60 ... 0x6f:
pvt->flags.zn_regs_v2 = 1;
break;
--
2.25.1
next reply other threads:[~2026-03-17 18:35 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-17 18:34 Devang Vyas [this message]
2026-03-19 15:03 ` Yazen Ghannam
2026-03-19 18:15 ` Borislav Petkov
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