From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B74E31B839; Fri, 20 Mar 2026 09:19:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773998348; cv=none; b=trJYjxneZLp0saWfME+uqsuvKv8QtsiCyxeALdCtPGypIqVwrG8DgY8WzHkwSvgwQUub7XjFPDIepWigmVHboXoNToVqIDTS4LQqXxzZyb2Ssy7dJf2lpuW4SQbbPRe4hmxiIuhJm0kGkdoDBW/01rweekJefc6fYy82X71DTBQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773998348; c=relaxed/simple; bh=LaFfclQJNpW8j4z2NNQXpLUkD7/mL0945GUUmdgcNYI=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=D7Eq8CVPkk/KL828EvLpwUBE0pZpmjQJG+DtuiSMydT+8Ag2O6aQw9YmsvKpMgbIuP3SlUm963H8qUtCv1ZK6LfjazQ4Fj3ZfYBI1Uj5dXCtxkYT3hFJUrs1o+f60yvnEJF3leS+8XC4q3V72sAZ90lSA6ljdjMa6x+SU7tHIcM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XxsQxNPg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XxsQxNPg" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C66ADC2BC9E; Fri, 20 Mar 2026 09:19:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773998348; bh=LaFfclQJNpW8j4z2NNQXpLUkD7/mL0945GUUmdgcNYI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=XxsQxNPgDUJHJqSei+eyT3/4wLXRMZEqzks3G36VQLFcfu9JWqwnY0mOg0MTOi1Ro 0xNBxOt4FxheBLRQZkCyILhWO4riIZOPSIilhvRCJqaqqdY6/5HF3hQPztctn6ucIX 1OKBg5jQrZDwH3wIHVCRAqYFJbjGKxwstlRNVQJe9i0P6mwq/PHNiGhZVoaXjuAI5d muiNrzaa0qk78JgPptsfReDFcKvx/Swv28NN4rw22m1qkBYrrXH64UWHgS8AKL1EqF sZayDTa+oC8LyGAjhTAcjJ2yxaJIEWbh77k+fYRJoB/Sn4EYeME3yGNRmV8G2OIOBE oEPtO3LUNwjSg== Date: Fri, 20 Mar 2026 10:19:06 +0100 From: Krzysztof Kozlowski To: Damon Ding Cc: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, nicolas.frattaroli@collabora.com, alchark@gmail.com, cristian.ciocaltea@collabora.com, sebastian.reichel@collabora.com, kever.yang@rock-chips.com, heiko.stuebner@cherry.de, tomeu@tomeuvizoso.net, amadeus@jmu.edu.cn, michael.riesch@collabora.com, didi.debian@cknow.org, dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com, dianders@chromium.org, m.szyprowski@samsung.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/9] dt-bindings: display: rockchip: analogix-dp: Expand clock-names "hclk" for the third clock Message-ID: <20260320-amusing-magnetic-harrier-20cc40@quoll> References: <20260319104031.1986946-1-damon.ding@rock-chips.com> <20260319104031.1986946-2-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260319104031.1986946-2-damon.ding@rock-chips.com> On Thu, Mar 19, 2026 at 06:40:23PM +0800, Damon Ding wrote: > The RK3588 eDP controller needs the video datapath clock "hclk" to work > well. Previously, it works without explicitly adding this clock because > the 'rockchip,vo-grf = <&vo1_grf>' property implicitly enables HCLK_VO1. > > Fixes: f855146263b1 ("dt-bindings: display: rockchip: analogix-dp: Add support for RK3588") > Signed-off-by: Damon Ding > --- > .../bindings/display/rockchip/rockchip,analogix-dp.yaml | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml > index d99b23b88cc5..d2bc8636b626 100644 > --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml > @@ -26,7 +26,9 @@ properties: > items: > - const: dp > - const: pclk > - - const: grf > + - enum: > + - grf > + - hclk You just told me it is the same clock, no? I asked that and you confirmed? Or you replied with an answer not relevant to the question? If this device takes reference to grf, why does it also take grf clock? Devices MUST NOT take clocks on behalf of other devices, so please answer with a list of all clock inputs according to datasheet/manual. Best regards, Krzysztof