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Fri, 20 Mar 2026 08:23:37 -0400 (EDT) From: Janne Grunau Subject: [PATCH 0/9] Initial Apple silicon M3 device trees and dt-bindings Date: Fri, 20 Mar 2026 13:23:18 +0100 Message-Id: <20260320-apple-m3-initial-devicetrees-v1-0-5842e1e393a8@jannau.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIADY8vWkC/x3MSwqEMBBF0a1IjbtA4w97K42DInlqgaZDIiKIe zc4PIN7L0qIikTf4qKIQ5P+fUb1Kcgu4mewumwypenKuhpYQljBW83qdVdZ2eXKYo9A4ta2TSd u6HsxlBchYtLz3f/G+34AHnfH8G4AAAA= X-Change-ID: 20260319-apple-m3-initial-devicetrees-5c546ad977a2 To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Neal Gompa , Wim Van Sebroeck , Guenter Roeck , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Janne Grunau , Michael Reeves X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2705; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=JxhD5pyU9TlybIWgDe9thdmFXajEwZfzNZlK9i5a+8A=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhsy9Nu6rPrWZBjtWxbX0vq5Q7L754tARZ53PcUICVrUqm u4pP1Z0lLIwiHExyIopsiRpv+xgWF2jGFP7IAxmDisTyBAGLk4BmMjTX4wMTYU/n1QZ/s7OO6Xz ymSv4kSnp5O2LVVQmTmj3u2v2+FbBxj+O9dPjIl8ZWn2pFxz+71ONYfr0g9to1fGFsxan1Yk9+A yKwA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 Hej, This series adds initial device trees for M3 Apple silicon devices. The device trees contain only a minimal set of hardware not going much beyond the minimum required for booting kernel and initramfs and verify via serial console that the hardware and drivers work. The hardware with the exception of the interrupt controller is compatible with the M1 and M2 SoCs and the existing drivers. Changes for the interrupt controller were sent separately in [1] and are picked up and in linux-next. The device trees pass make dtbs_check with the apple,aic2 dt-bindings change from that series. Link: https://lore.kernel.org/asahi/20260223-irq-apple-aic3-v3-0-2b7328076b8d@jannau.net/ [1] Signed-off-by: Janne Grunau --- Janne Grunau (9): dt-bindings: arm: cpus: Add Apple M3 CPU core compatibles dt-bindings: arm: apple: apple,pmgr: Add t8122 compatible dt-bindings: power: apple,pmgr-pwrstate: Add t8122 compatible dt-bindings: watchdog: apple,wdt: Add t8122 compatible dt-bindings: pinctrl: apple,pinctrl: Add t8122 compatible dt-bindings: i2c: apple,i2c: Add t8122 compatible dt-bindings: pwm: apple,s5l-fpwm: Add t8122 compatible dt-bindings: arm: apple: Add M3 based devices arm64: dts: apple: Initial t8122 (M3) device trees Documentation/devicetree/bindings/arm/apple.yaml | 18 + .../devicetree/bindings/arm/apple/apple,pmgr.yaml | 4 +- Documentation/devicetree/bindings/arm/cpus.yaml | 2 + .../devicetree/bindings/i2c/apple,i2c.yaml | 4 +- .../devicetree/bindings/pinctrl/apple,pinctrl.yaml | 4 +- .../bindings/power/apple,pmgr-pwrstate.yaml | 4 +- .../devicetree/bindings/pwm/apple,s5l-fpwm.yaml | 1 + .../devicetree/bindings/watchdog/apple,wdt.yaml | 4 +- arch/arm64/boot/dts/apple/Makefile | 5 + arch/arm64/boot/dts/apple/t8122-j433.dts | 19 + arch/arm64/boot/dts/apple/t8122-j434.dts | 19 + arch/arm64/boot/dts/apple/t8122-j504.dts | 37 + arch/arm64/boot/dts/apple/t8122-j613.dts | 35 + arch/arm64/boot/dts/apple/t8122-j615.dts | 35 + arch/arm64/boot/dts/apple/t8122-jxxx.dtsi | 48 + arch/arm64/boot/dts/apple/t8122-pmgr.dtsi | 1149 ++++++++++++++++++++ arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi | 32 + arch/arm64/boot/dts/apple/t8122.dtsi | 444 ++++++++ 18 files changed, 1859 insertions(+), 5 deletions(-) --- base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f change-id: 20260319-apple-m3-initial-devicetrees-5c546ad977a2 Best regards, -- Janne Grunau