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Move MSM HDMI PHY drivers to drivers/phy/qualcomm and rework them to use generic PHY framework. This way all the QMP-related code is kept at the same place. Also MSM8974 HDMI PHY, 28nm DSI PHY and apq8964 SATA PHY now can use common helpers for the UNI PLL. This also causes some design changes. Currently on MSM8996 the HDMI PLL implements clock's set_rate(), while other HDMI PHY drivers used the ad-hoc PHY API for setting the PLL rate (this includes in-tree MSM8960 driver and posted, but not merged, MSM8974 driver). This might result in the PLL being set to one rate, while the rest of the PHY being tuned to work at another rate. Adopt the latter idea and always use phy_configure() to tune the PHY and set the PLL rate. Merge strategy: Merge the first patch (either through drm/msm or through the PHY tree), merge the rest of the patches in the next cycle. Signed-off-by: Dmitry Baryshkov --- Changes in v7: - Fixed the build issue between msm8974 patches. - Dropped even more writel / readl wrappers (now from QMP PHYs) - Link to v6: https://lore.kernel.org/r/20260319-fd-hdmi-phy-v6-0-cefc08a55470@oss.qualcomm.com Changes in v6: - Changed MSM8974 HDMI PHY driver to use FIELD_PREP / FIELD_GET (Konrad) - Fixed rate recalculation for MSM8974 HDMI PHY (Konrad) - Dropped register read/write wrappers - Link to v5: https://lore.kernel.org/r/20260314-fd-hdmi-phy-v5-0-58122ae96d3b@oss.qualcomm.com Changes in v5: - Kept only a single place which handles extp clk (after PHY power on, before PHY power off) (Neil) - Inlined pm_runtime calls in the HDMI TX driver, replaced pm_runtime_resume_and_get() with pm_runtime_get_sync(), since atomic_pre_enable() can not fail. - Renamed registers defines to drop the REG_ prefix. - Link to v4: https://lore.kernel.org/r/20250520-fd-hdmi-phy-v4-0-fcbaa652ad75@oss.qualcomm.com Changes in v3-v4: - Rebased on top of linux-next, solving conflicts - Squashed add-and-remove patches into a single git mv patch - Dropped HDMI PHY header patch (merged upstream) Changes in v2: - Changed msm8960 / apq8064 to calculate register data instead of using fixed tables. This extends the list of supported modes. (Implementation is based on mdss-hdmi-pll-28lpm.c from msm-4.14). - Fixed the reprogramming of PLL rate on apq8064. - Merged all non-QMP HDMI PHY drivers into a common PHY_QCOM_HDMI driver (suggested by Rob Clark) --- Dmitry Baryshkov (4): drm/msm/hdmi: switch to generic PHY subsystem phy: qcom: apq8064-sata: extract UNI PLL register defines phy: qcom-uniphy: add more registers from display PHYs phy: qualcomm: add MSM8974 HDMI PHY support drivers/gpu/drm/msm/Makefile | 7 - drivers/gpu/drm/msm/hdmi/hdmi.c | 58 +- drivers/gpu/drm/msm/hdmi/hdmi.h | 80 +-- drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 80 ++- drivers/gpu/drm/msm/hdmi/hdmi_phy.c | 225 ------- drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 51 -- drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c | 761 ---------------------- drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 765 ----------------------- drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c | 141 ----- drivers/gpu/drm/msm/hdmi/hdmi_phy_8x74.c | 44 -- drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c | 460 -------------- drivers/gpu/drm/msm/registers/display/hdmi.xml | 537 ---------------- drivers/phy/qualcomm/Kconfig | 24 + drivers/phy/qualcomm/Makefile | 14 + drivers/phy/qualcomm/phy-qcom-apq8064-sata.c | 23 +- drivers/phy/qualcomm/phy-qcom-hdmi-28hpm.c | 352 +++++++++++ drivers/phy/qualcomm/phy-qcom-hdmi-28lpm.c | 462 ++++++++++++++ drivers/phy/qualcomm/phy-qcom-hdmi-45nm.c | 186 ++++++ drivers/phy/qualcomm/phy-qcom-hdmi-preqmp.c | 212 +++++++ drivers/phy/qualcomm/phy-qcom-hdmi-preqmp.h | 59 ++ drivers/phy/qualcomm/phy-qcom-qmp-hdmi-base.c | 185 ++++++ drivers/phy/qualcomm/phy-qcom-qmp-hdmi-msm8996.c | 440 +++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp-hdmi-msm8998.c | 489 +++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp-hdmi.h | 49 ++ drivers/phy/qualcomm/phy-qcom-uniphy.h | 74 +++ 25 files changed, 2590 insertions(+), 3188 deletions(-) --- base-commit: 95bcfacccdad8a76e02a8eaa92baaf09c879877e change-id: 20240109-fd-hdmi-phy-44b8319fbcc7 Best regards, -- With best wishes Dmitry