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Fri, 27 Mar 2026 02:03:55 -0700 (PDT) Received: from hu-pkambar-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35c22a81744sm4230006a91.5.2026.03.27.02.03.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Mar 2026 02:03:54 -0700 (PDT) From: palash.kambar@oss.qualcomm.com To: mani@kernel.org, James.Bottomley@HansenPartnership.com, martin.petersen@oracle.com Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, bvanassche@acm.org, shawn.lin@rock-chips.com, nitin.rawat@oss.qualcomm.com, Palash Kambar Subject: [PATCH V2 0/2] Add post change sequence for link start notify Date: Fri, 27 Mar 2026 14:33:44 +0530 Message-Id: <20260327090346.656324-1-palash.kambar@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: iMbY9Exh9XefAfKJL7yjIjNo-AUNJO-2 X-Authority-Analysis: v=2.4 cv=bopBxUai c=1 sm=1 tr=0 ts=69c647fc cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=rbNoiXgGD7Sd92Kb1yEA:9 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-ORIG-GUID: iMbY9Exh9XefAfKJL7yjIjNo-AUNJO-2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI3MDA2NiBTYWx0ZWRfX+ojY6gJGzziU Xfxn7kP7pV/yW3bTCt7WZUEN74DiVmyKQ/I7T9wAe5BYzrLuZOJecwCYt3I+90BQvXv9MNZ75TN c5C6IP0dCIDzznySyh0n92Dq2kazT98KFrhyiT/viSYAbvS/nA0PMuQocnmXMo2hq2Ova+Ia4EA kxly0VA11SEQuH3HzE6KAruXEnKAYA6voj7mdB2x/6Cvy4w3Eq1JLtF0VitDV1Q6c5Sd7HeyDwt 6aHw9+7nqUz/pzdA9DarAv8JLnHUvwdDYnVJ6X6wHAFlsK/kW/E5NYQALQyJNNtY5AJZ6qJl0K6 eXap7QJI4CQfu1KQXFb/C6wTuX+u/ICwsXFWcufmyTGnOZQo1kGmDmiq+3JY4u0IxMe/kWtfUlp 5vzp3ZFqPkF4oAycsLo9wrj22o/3glpWnr/dt2T4wrcHCoEw1xljAjAaOUZqSDlX+fCHhkv5/iB uaUOsyW96ZHZ89EVMIA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-26_04,2026-03-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 suspectscore=0 malwarescore=0 adultscore=0 priorityscore=1501 phishscore=0 impostorscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603270066 From: Palash Kambar This patch series introduces two updates to the UFS subsystem aimed at improving link stability and power efficiency on platforms using the Qualcomm UFS host controller. During link startup, the number of connected TX/RX lanes discovered may be fewer than the lanes specified in the device tree. The current UFS core driver configures all DT-defined lanes unconditionally, which can lead to mismatches during power mode changes. Patch 1/2 ensures to fail on this. Additionally, certain Qualcomm platforms support Auto Hibern8 (AH8), where the UFS controller autonomously de-asserts clk_req signals to the GCC during Hibern8 state. Enabling this mechanism allows the clock controller to gate unused clocks, providing meaningful power savings. Patch 2/2 adds support for enabling this feature as recommended by the Hardware Programming Guidelines. --- changes from V1 1) Addressed Shawn Lin's comments to fix comment to connected lanes. 2) Addressed Bart's comments to remove warning and trigger failure incase of lane mismatch. --- Palash Kambar (2): ufs: core: Configure only active lanes during link ufs: ufs-qcom: Enable Auto Hibern8 clock request support drivers/ufs/core/ufshcd.c | 39 +++++++++++++++++++++++++++++++++++++ drivers/ufs/host/ufs-qcom.c | 11 +++++++++++ drivers/ufs/host/ufs-qcom.h | 11 +++++++++++ 3 files changed, 61 insertions(+) -- 2.34.1