From: Xu Yilun <yilun.xu@linux.intel.com>
To: linux-coco@lists.linux.dev, linux-pci@vger.kernel.org,
dan.j.williams@intel.com, x86@kernel.org
Cc: chao.gao@intel.com, dave.jiang@intel.com,
baolu.lu@linux.intel.com, yilun.xu@linux.intel.com,
yilun.xu@intel.com, zhenzhong.duan@intel.com,
kvm@vger.kernel.org, rick.p.edgecombe@intel.com,
dave.hansen@linux.intel.com, kas@kernel.org,
xiaoyao.li@intel.com, vishal.l.verma@intel.com,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 30/31] coco/tdx-host: Implement IDE stream setup/teardown
Date: Sat, 28 Mar 2026 00:01:31 +0800 [thread overview]
Message-ID: <20260327160132.2946114-31-yilun.xu@linux.intel.com> (raw)
In-Reply-To: <20260327160132.2946114-1-yilun.xu@linux.intel.com>
Implementation for a most straightforward Selective IDE stream setup.
Hard code all parameters for Stream Control Register. And no IDE Key
Refresh support.
Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
---
include/linux/pci-ide.h | 2 +
drivers/pci/ide.c | 5 +-
drivers/virt/coco/tdx-host/tdx-host.c | 226 ++++++++++++++++++++++++++
3 files changed, 231 insertions(+), 2 deletions(-)
diff --git a/include/linux/pci-ide.h b/include/linux/pci-ide.h
index 381a1bf22a95..f0c6975fd429 100644
--- a/include/linux/pci-ide.h
+++ b/include/linux/pci-ide.h
@@ -106,6 +106,8 @@ struct pci_ide {
void pci_ide_set_nr_streams(struct pci_host_bridge *hb, u16 nr);
struct pci_ide_partner *pci_ide_to_settings(struct pci_dev *pdev,
struct pci_ide *ide);
+void pci_ide_stream_to_regs(struct pci_dev *pdev, struct pci_ide *ide,
+ struct pci_ide_regs *regs);
struct pci_ide *pci_ide_stream_alloc(struct pci_dev *pdev);
void pci_ide_stream_free(struct pci_ide *ide);
int pci_ide_stream_register(struct pci_ide *ide);
diff --git a/drivers/pci/ide.c b/drivers/pci/ide.c
index b35e8aba7ecb..1337608448c2 100644
--- a/drivers/pci/ide.c
+++ b/drivers/pci/ide.c
@@ -556,8 +556,8 @@ static void mem_assoc_to_regs(struct pci_bus_region *region,
* @ide: registered IDE settings descriptor
* @regs: output register values
*/
-static void pci_ide_stream_to_regs(struct pci_dev *pdev, struct pci_ide *ide,
- struct pci_ide_regs *regs)
+void pci_ide_stream_to_regs(struct pci_dev *pdev, struct pci_ide *ide,
+ struct pci_ide_regs *regs)
{
struct pci_ide_partner *settings = pci_ide_to_settings(pdev, ide);
int assoc_idx = 0;
@@ -586,6 +586,7 @@ static void pci_ide_stream_to_regs(struct pci_dev *pdev, struct pci_ide *ide,
regs->nr_addr = assoc_idx;
}
+EXPORT_SYMBOL_GPL(pci_ide_stream_to_regs);
/**
* pci_ide_stream_setup() - program settings to Selective IDE Stream registers
diff --git a/drivers/virt/coco/tdx-host/tdx-host.c b/drivers/virt/coco/tdx-host/tdx-host.c
index d5072a68b81a..0f6056945788 100644
--- a/drivers/virt/coco/tdx-host/tdx-host.c
+++ b/drivers/virt/coco/tdx-host/tdx-host.c
@@ -72,6 +72,10 @@ struct tdx_tsm_link {
struct tdx_page_array *spdm_mt;
unsigned int dev_info_size;
void *dev_info_data;
+
+ struct pci_ide *ide;
+ struct tdx_page_array *stream_mt;
+ unsigned int stream_id;
};
static struct tdx_tsm_link *to_tdx_tsm_link(struct pci_tsm *tsm)
@@ -351,6 +355,219 @@ static void tdx_spdm_session_teardown(struct tdx_tsm_link *tlink)
DEFINE_FREE(tdx_spdm_session_teardown, struct tdx_tsm_link *,
if (!IS_ERR_OR_NULL(_T)) tdx_spdm_session_teardown(_T))
+enum tdx_ide_stream_km_op {
+ TDX_IDE_STREAM_KM_SETUP = 0,
+ TDX_IDE_STREAM_KM_REFRESH = 1,
+ TDX_IDE_STREAM_KM_STOP = 2,
+};
+
+static int tdx_ide_stream_km(struct tdx_tsm_link *tlink,
+ enum tdx_ide_stream_km_op op)
+{
+ u64 r, out_msg_sz;
+ int ret;
+
+ do {
+ r = tdh_ide_stream_km(tlink->spdm_id, tlink->stream_id, op,
+ tlink->in_msg, tlink->out_msg,
+ &out_msg_sz);
+ ret = tdx_tsm_link_event_handler(tlink, r, out_msg_sz);
+ } while (ret == -EAGAIN);
+
+ return ret;
+}
+
+static struct tdx_tsm_link *
+tdx_ide_stream_key_program(struct tdx_tsm_link *tlink)
+{
+ int ret;
+
+ ret = tdx_ide_stream_km(tlink, TDX_IDE_STREAM_KM_SETUP);
+ if (ret)
+ return ERR_PTR(ret);
+
+ return tlink;
+}
+
+static void tdx_ide_stream_key_stop(struct tdx_tsm_link *tlink)
+{
+ tdx_ide_stream_km(tlink, TDX_IDE_STREAM_KM_STOP);
+}
+
+DEFINE_FREE(tdx_ide_stream_key_stop, struct tdx_tsm_link *,
+ if (!IS_ERR_OR_NULL(_T)) tdx_ide_stream_key_stop(_T))
+
+static void sel_stream_block_regs(struct pci_dev *pdev, struct pci_ide *ide,
+ struct pci_ide_regs *regs)
+{
+ struct pci_dev *rp = pcie_find_root_port(pdev);
+ struct pci_ide_partner *setting = pci_ide_to_settings(rp, ide);
+
+ /* only support address association for prefetchable memory */
+ setting->mem_assoc = (struct pci_bus_region) { 0, -1 };
+ pci_ide_stream_to_regs(rp, ide, regs);
+}
+
+#define STREAM_INFO_RP_DEVFN GENMASK_ULL(7, 0)
+#define STREAM_INFO_TYPE BIT_ULL(8)
+#define STREAM_INFO_TYPE_LINK 0
+#define STREAM_INFO_TYPE_SEL 1
+
+static struct tdx_tsm_link *tdx_ide_stream_create(struct tdx_tsm_link *tlink,
+ struct pci_ide *ide)
+{
+ u64 stream_info, stream_ctrl;
+ u64 stream_id, rp_ide_id;
+ unsigned int nr_pages = tdx_sysinfo->connect.ide_mt_page_count;
+ struct pci_dev *pdev = tlink->pci.base_tsm.pdev;
+ struct pci_dev *rp = pcie_find_root_port(pdev);
+ struct pci_ide_regs regs;
+ u64 r;
+
+ struct tdx_page_array *stream_mt __free(tdx_page_array_free) =
+ tdx_page_array_create(nr_pages);
+ if (!stream_mt)
+ return ERR_PTR(-ENOMEM);
+
+ stream_info = FIELD_PREP(STREAM_INFO_RP_DEVFN, rp->devfn);
+ stream_info |= FIELD_PREP(STREAM_INFO_TYPE, STREAM_INFO_TYPE_SEL);
+
+ /*
+ * For Selective IDE stream, below values must be 0:
+ * NPR_AGG/PR_AGG/CPL_AGG/CONF_REQ/ALGO/DEFAULT/STREAM_ID
+ *
+ * below values are configurable but now hardcode to 0:
+ * PCRC/TC
+ */
+ stream_ctrl = FIELD_PREP(PCI_IDE_SEL_CTL_EN, 0) |
+ FIELD_PREP(PCI_IDE_SEL_CTL_TX_AGGR_NPR, 0) |
+ FIELD_PREP(PCI_IDE_SEL_CTL_TX_AGGR_PR, 0) |
+ FIELD_PREP(PCI_IDE_SEL_CTL_TX_AGGR_CPL, 0) |
+ FIELD_PREP(PCI_IDE_SEL_CTL_PCRC_EN, 0) |
+ FIELD_PREP(PCI_IDE_SEL_CTL_CFG_EN, 0) |
+ FIELD_PREP(PCI_IDE_SEL_CTL_ALG, 0) |
+ FIELD_PREP(PCI_IDE_SEL_CTL_TC, 0) |
+ FIELD_PREP(PCI_IDE_SEL_CTL_ID, 0);
+
+ sel_stream_block_regs(pdev, ide, ®s);
+ if (regs.nr_addr != 1)
+ return ERR_PTR(-EFAULT);
+
+ r = tdh_ide_stream_create(stream_info, tlink->spdm_id,
+ stream_mt, stream_ctrl,
+ regs.rid1, regs.rid2, regs.addr[0].assoc1,
+ regs.addr[0].assoc2, regs.addr[0].assoc3,
+ &stream_id, &rp_ide_id);
+ if (r)
+ return ERR_PTR(-EFAULT);
+
+ tlink->stream_id = stream_id;
+ tlink->stream_mt = no_free_ptr(stream_mt);
+
+ pci_dbg(pdev, "%s stream id 0x%x rp ide_id 0x%llx\n", __func__,
+ tlink->stream_id, rp_ide_id);
+ return tlink;
+}
+
+static void tdx_ide_stream_delete(struct tdx_tsm_link *tlink)
+{
+ struct pci_dev *pdev = tlink->pci.base_tsm.pdev;
+ unsigned int nr_released;
+ u64 released_hpa, r;
+
+ r = tdh_ide_stream_block(tlink->spdm_id, tlink->stream_id);
+ if (r) {
+ pci_err(pdev, "ide stream block fail 0x%llx\n", r);
+ goto leak;
+ }
+
+ r = tdh_ide_stream_delete(tlink->spdm_id, tlink->stream_id,
+ tlink->stream_mt, &nr_released,
+ &released_hpa);
+ if (r) {
+ pci_err(pdev, "ide stream delete fail 0x%llx\n", r);
+ goto leak;
+ }
+
+ if (tdx_page_array_ctrl_release(tlink->stream_mt, nr_released,
+ released_hpa)) {
+ pci_err(pdev, "fail to release IDE stream_mt pages\n");
+ goto leak;
+ }
+
+ return;
+
+leak:
+ tdx_page_array_ctrl_leak(tlink->stream_mt);
+}
+
+DEFINE_FREE(tdx_ide_stream_delete, struct tdx_tsm_link *,
+ if (!IS_ERR_OR_NULL(_T)) tdx_ide_stream_delete(_T))
+
+static struct tdx_tsm_link *tdx_ide_stream_setup(struct tdx_tsm_link *tlink)
+{
+ struct pci_dev *pdev = tlink->pci.base_tsm.pdev;
+ int ret;
+
+ struct pci_ide *ide __free(pci_ide_stream_release) =
+ pci_ide_stream_alloc(pdev);
+ if (!ide)
+ return ERR_PTR(-ENOMEM);
+
+ /* Configure IDE capability for RP & get stream_id */
+ struct tdx_tsm_link *tlink_create __free(tdx_ide_stream_delete) =
+ tdx_ide_stream_create(tlink, ide);
+ if (IS_ERR(tlink_create))
+ return tlink_create;
+
+ ide->stream_id = tlink->stream_id;
+ ret = pci_ide_stream_register(ide);
+ if (ret)
+ return ERR_PTR(ret);
+
+ /*
+ * Configure IDE capability for target device
+ *
+ * Some test devices work only with DEFAULT_STREAM enabled. For
+ * simplicity, enable DEFAULT_STREAM for all devices. A future decent
+ * solution may be to have a quirk table to specify which devices need
+ * DEFAULT_STREAM.
+ */
+ ide->partner[PCI_IDE_EP].default_stream = 1;
+ pci_ide_stream_setup(pdev, ide);
+
+ /* Key Programming for RP & target device, enable IDE stream for RP */
+ struct tdx_tsm_link *tlink_program __free(tdx_ide_stream_key_stop) =
+ tdx_ide_stream_key_program(tlink);
+ if (IS_ERR(tlink_program))
+ return tlink_program;
+
+ ret = tsm_ide_stream_register(ide);
+ if (ret)
+ return ERR_PTR(ret);
+
+ /* Enable IDE stream for target device */
+ ret = pci_ide_stream_enable(pdev, ide);
+ if (ret)
+ return ERR_PTR(ret);
+
+ retain_and_null_ptr(tlink_create);
+ retain_and_null_ptr(tlink_program);
+ tlink->ide = no_free_ptr(ide);
+
+ return tlink;
+}
+
+static void tdx_ide_stream_teardown(struct tdx_tsm_link *tlink)
+{
+ tdx_ide_stream_key_stop(tlink);
+ tdx_ide_stream_delete(tlink);
+ pci_ide_stream_release(tlink->ide);
+}
+
+DEFINE_FREE(tdx_ide_stream_teardown, struct tdx_tsm_link *,
+ if (!IS_ERR_OR_NULL(_T)) tdx_ide_stream_teardown(_T))
+
static int tdx_tsm_link_connect(struct pci_dev *pdev)
{
struct tdx_tsm_link *tlink = to_tdx_tsm_link(pdev->tsm);
@@ -362,7 +579,15 @@ static int tdx_tsm_link_connect(struct pci_dev *pdev)
return PTR_ERR(tlink_spdm);
}
+ struct tdx_tsm_link *tlink_ide __free(tdx_ide_stream_teardown) =
+ tdx_ide_stream_setup(tlink);
+ if (IS_ERR(tlink_ide)) {
+ pci_err(pdev, "fail to setup ide stream\n");
+ return PTR_ERR(tlink_ide);
+ }
+
retain_and_null_ptr(tlink_spdm);
+ retain_and_null_ptr(tlink_ide);
return 0;
}
@@ -371,6 +596,7 @@ static void tdx_tsm_link_disconnect(struct pci_dev *pdev)
{
struct tdx_tsm_link *tlink = to_tdx_tsm_link(pdev->tsm);
+ tdx_ide_stream_teardown(tlink);
tdx_spdm_session_teardown(tlink);
}
--
2.25.1
next prev parent reply other threads:[~2026-03-27 16:24 UTC|newest]
Thread overview: 153+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-27 16:01 [PATCH v2 00/31] PCI/TSM: PCIe Link Encryption Establishment via TDX platform services Xu Yilun
2026-03-27 16:01 ` [PATCH v2 01/31] x86/tdx: Move all TDX error defines into <asm/shared/tdx_errno.h> Xu Yilun
2026-03-27 23:37 ` Edgecombe, Rick P
2026-03-28 1:16 ` Dan Williams
2026-03-30 7:07 ` Xu Yilun
2026-03-30 7:10 ` Xu Yilun
2026-03-31 0:01 ` Dave Hansen
2026-03-27 16:01 ` [PATCH v2 02/31] x86/virt/tdx: Move bit definitions of TDX_FEATURES0 to public header Xu Yilun
2026-03-27 23:45 ` Edgecombe, Rick P
2026-03-30 8:07 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 03/31] x86/virt/tdx: Add tdx_page_array helpers for new TDX Module objects Xu Yilun
2026-03-28 1:35 ` Edgecombe, Rick P
2026-03-30 10:25 ` Xu Yilun
2026-03-30 23:25 ` Edgecombe, Rick P
2026-03-31 6:25 ` Tony Lindgren
2026-04-01 7:25 ` Tony Lindgren
2026-03-30 15:47 ` Xu Yilun
2026-03-30 23:57 ` Edgecombe, Rick P
2026-03-31 10:11 ` Xu Yilun
2026-03-30 13:31 ` Nikolay Borisov
2026-03-31 13:31 ` Xu Yilun
2026-04-12 2:53 ` Dan Williams
2026-04-16 9:05 ` Xu Yilun
2026-04-17 23:36 ` Dan Williams
2026-04-19 9:20 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 04/31] x86/virt/tdx: Support allocating contiguous pages for tdx_page_array Xu Yilun
2026-03-30 13:48 ` Nikolay Borisov
2026-03-31 13:37 ` Xu Yilun
2026-04-18 0:05 ` Dan Williams
2026-03-27 16:01 ` [PATCH v2 05/31] x86/virt/tdx: Extend tdx_page_array to support IOMMU_MT Xu Yilun
2026-03-30 23:54 ` Edgecombe, Rick P
2026-03-31 14:19 ` Xu Yilun
2026-04-01 0:17 ` Edgecombe, Rick P
2026-04-08 4:29 ` Xu Yilun
2026-04-14 9:57 ` Xu Yilun
2026-04-16 5:07 ` Xu Yilun
2026-04-17 23:58 ` Dan Williams
2026-04-19 8:33 ` Xu Yilun
2026-04-21 21:51 ` Dan Williams
2026-04-23 11:15 ` Xu Yilun
2026-04-02 0:05 ` Huang, Kai
2026-04-08 6:16 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 06/31] x86/virt/tdx: Read global metadata for TDX Module Extensions/Connect Xu Yilun
2026-03-30 14:23 ` Nikolay Borisov
2026-03-31 14:23 ` Xu Yilun
2026-04-01 21:36 ` Huang, Kai
2026-04-08 6:17 ` Xu Yilun
2026-04-21 22:19 ` Dan Williams
2026-04-23 11:58 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 07/31] x86/virt/tdx: Embed version info in SEAMCALL leaf function definitions Xu Yilun
2026-03-27 16:01 ` [PATCH v2 08/31] x86/virt/tdx: Configure TDX Module with optional TDX Connect feature Xu Yilun
2026-03-31 10:38 ` Nikolay Borisov
2026-04-08 7:21 ` Xu Yilun
2026-04-01 10:13 ` Huang, Kai
2026-04-08 7:12 ` Xu Yilun
2026-04-08 8:33 ` Huang, Kai
2026-04-01 23:42 ` Huang, Kai
2026-04-01 23:53 ` Edgecombe, Rick P
2026-04-02 0:40 ` Huang, Kai
2026-04-02 0:48 ` Dave Hansen
2026-04-02 1:06 ` Huang, Kai
2026-04-22 1:19 ` Dan Williams
2026-04-23 15:49 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 09/31] x86/virt/tdx: Move tdx_clflush_page() up in the file Xu Yilun
2026-03-27 16:01 ` [PATCH v2 10/31] x86/virt/tdx: Add extra memory to TDX Module for Extensions Xu Yilun
2026-03-30 23:36 ` Edgecombe, Rick P
2026-03-31 11:00 ` Nikolay Borisov
2026-04-08 7:28 ` Xu Yilun
2026-04-23 0:59 ` Huang, Kai
2026-04-23 16:41 ` Xu Yilun
2026-04-23 21:55 ` Huang, Kai
2026-04-23 17:05 ` Edgecombe, Rick P
2026-04-23 22:29 ` Huang, Kai
2026-04-24 3:07 ` Xu Yilun
2026-04-24 8:09 ` Huang, Kai
2026-04-24 9:10 ` Huang, Kai
2026-04-24 10:41 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 11/31] x86/virt/tdx: Make TDX Module initialize Extensions Xu Yilun
2026-03-30 23:25 ` Edgecombe, Rick P
2026-03-31 14:58 ` Xu Yilun
2026-04-01 11:42 ` Huang, Kai
2026-04-08 8:24 ` Xu Yilun
2026-04-08 21:24 ` Huang, Kai
2026-04-09 0:49 ` Edgecombe, Rick P
2026-04-09 1:29 ` Huang, Kai
2026-03-27 16:01 ` [PATCH v2 12/31] x86/virt/tdx: Enable the Extensions after basic TDX Module init Xu Yilun
2026-03-27 16:01 ` [PATCH v2 13/31] x86/virt/tdx: Extend tdx_clflush_page() to handle compound pages Xu Yilun
2026-03-27 16:01 ` [PATCH v2 14/31] PCI/TSM: Report active IDE streams per host bridge Xu Yilun
2026-04-02 22:48 ` Dan Williams
2026-04-07 16:08 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 15/31] coco/tdx-host: Introduce a "tdx_host" device Xu Yilun
2026-07-04 14:26 ` Ackerley Tng
2026-03-27 16:01 ` [PATCH v2 16/31] coco/tdx-host: Support Link TSM for TDX host Xu Yilun
2026-07-06 20:12 ` Ackerley Tng
2026-03-27 16:01 ` [PATCH v2 17/31] acpi: Add KEYP support to fw_table parsing Xu Yilun
2026-03-27 16:01 ` [PATCH v2 18/31] iommu/vt-d: Cache max domain ID to avoid redundant calculation Xu Yilun
2026-04-09 7:02 ` Tian, Kevin
2026-07-27 3:07 ` Baolu Lu
2026-03-27 16:01 ` [PATCH v2 19/31] iommu/vt-d: Reserve the MSB domain ID bit for the TDX module Xu Yilun
2026-03-28 16:57 ` kernel test robot
2026-03-31 7:20 ` Baolu Lu
2026-04-08 12:07 ` Xu Yilun
2026-04-09 5:48 ` Baolu Lu
2026-03-28 19:58 ` kernel test robot
2026-04-09 7:16 ` Tian, Kevin
2026-04-22 6:00 ` Xu Yilun
2026-04-24 6:49 ` Tian, Kevin
2026-04-27 2:50 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 20/31] x86/virt/tdx: Add a helper to loop on TDX_INTERRUPTED_RESUMABLE Xu Yilun
2026-04-09 7:21 ` Tian, Kevin
2026-04-22 6:04 ` Xu Yilun
2026-04-24 6:57 ` Tian, Kevin
2026-07-04 14:45 ` Ackerley Tng
2026-04-23 0:29 ` Huang, Kai
2026-07-04 14:42 ` Ackerley Tng
2026-07-06 9:16 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 21/31] x86/virt/tdx: Add SEAMCALL wrappers for trusted IOMMU setup and clear Xu Yilun
2026-04-09 7:30 ` Tian, Kevin
2026-04-22 6:32 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 22/31] iommu/vt-d: Export a helper to do function for each dmar_drhd_unit Xu Yilun
2026-04-09 7:49 ` Tian, Kevin
2026-04-22 6:33 ` Xu Yilun
2026-04-24 6:50 ` Tian, Kevin
2026-07-06 18:35 ` Ackerley Tng
2026-03-27 16:01 ` [PATCH v2 23/31] coco/tdx-host: Setup all trusted IOMMUs on TDX Connect init Xu Yilun
2026-04-09 7:51 ` Tian, Kevin
2026-04-22 9:27 ` Xu Yilun
2026-04-24 6:54 ` Tian, Kevin
2026-04-27 3:10 ` Xu Yilun
2026-07-06 19:21 ` Ackerley Tng
2026-03-27 16:01 ` [PATCH v2 24/31] coco/tdx-host: Add a helper to exchange SPDM messages through DOE Xu Yilun
2026-04-09 7:56 ` Tian, Kevin
2026-04-22 9:41 ` Xu Yilun
2026-04-24 7:01 ` Tian, Kevin
2026-04-27 3:34 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 25/31] x86/virt/tdx: Add SEAMCALL wrappers for SPDM management Xu Yilun
2026-04-09 7:59 ` Tian, Kevin
2026-04-22 9:46 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 26/31] mm: Add __free() support for __free_page() Xu Yilun
2026-07-06 19:31 ` Ackerley Tng
2026-03-27 16:01 ` [PATCH v2 27/31] coco/tdx-host: Implement SPDM session setup Xu Yilun
2026-04-02 11:29 ` Nikolay Borisov
2026-04-22 9:53 ` Xu Yilun
2026-03-27 16:01 ` [PATCH v2 28/31] coco/tdx-host: Parse ACPI KEYP table to init IDE for PCI host bridges Xu Yilun
2026-07-06 19:46 ` Ackerley Tng
2026-03-27 16:01 ` [PATCH v2 29/31] x86/virt/tdx: Add SEAMCALL wrappers for IDE stream management Xu Yilun
2026-03-27 16:01 ` Xu Yilun [this message]
2026-04-09 8:02 ` [PATCH v2 30/31] coco/tdx-host: Implement IDE stream setup/teardown Tian, Kevin
2026-04-22 9:57 ` Xu Yilun
2026-04-24 7:05 ` Tian, Kevin
2026-04-27 3:54 ` Xu Yilun
2026-07-06 20:05 ` Ackerley Tng
2026-03-27 16:01 ` [PATCH v2 31/31] coco/tdx-host: Finally enable SPDM session and IDE Establishment Xu Yilun
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