From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
<joro@8bytes.org>, <jgg@nvidia.com>
Cc: <yi.l.liu@intel.com>, <kevin.tian@intel.com>,
<nicolinc@nvidia.com>, <vasant.hegde@amd.com>,
<jon.grimm@amd.com>, <santosh.shukla@amd.com>,
<sairaj.arunkodilkar@amd.com>, <jay.chen@amd.com>,
<wvw@google.com>, <wnliu@google.com>, <dantuluris@google.com>,
<chriscli@google.com>, <kpsingh@google.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH 22/22] iommu/amd: Introduce logic to check and enable vIOMMU feature
Date: Mon, 30 Mar 2026 08:42:06 +0000 [thread overview]
Message-ID: <20260330084206.9251-23-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20260330084206.9251-1-suravee.suthikulpanit@amd.com>
Also switch to enable vIOMMU by default, and provide kernel boot option to
disable the feature.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/amd_iommu_types.h | 3 +++
drivers/iommu/amd/init.c | 14 +++++++++++++-
drivers/iommu/amd/viommu.c | 16 ++++++++++++++++
4 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 38694ebdb083..2b057ab77ce8 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -25,6 +25,7 @@ void amd_iommu_restart_ga_log(struct amd_iommu *iommu);
void amd_iommu_restart_ppr_log(struct amd_iommu *iommu);
void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
void iommu_feature_enable(struct amd_iommu *iommu, u8 bit);
+bool iommu_feature_enable_and_check(struct amd_iommu *iommu, u8 bit);
void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
gfp_t gfp, size_t size);
u8 __iomem * __init iommu_map_mmio_space(u64 address, u64 end);
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index ff72023fa512..4667efcfb8e9 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -204,9 +204,12 @@
#define CONTROL_EPH_EN 45
#define CONTROL_PPR_AUTO_RSP_AON 48
#define CONTROL_XT_EN 50
+#define CONTROL_VCMD_EN 52
+#define CONTROL_VIOMMU_EN 53
#define CONTROL_INTCAPXT_EN 51
#define CONTROL_GCR3TRPMODE 58
#define CONTROL_IRTCACHEDIS 59
+#define CONTROL_GSTBUFFERTRPMODE 60
#define CONTROL_SNPAVIC_EN 61
#define CTRL_INV_TO_MASK 7
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 0018ae804ab4..63271f4305de 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -195,7 +195,7 @@ bool amdr_ivrs_remap_support __read_mostly;
bool amd_iommu_force_isolation __read_mostly;
/* VIOMMU enabling flag */
-bool amd_iommu_viommu;
+bool amd_iommu_viommu = true;
unsigned long amd_iommu_pgsize_bitmap __ro_after_init = AMD_IOMMU_PGSIZES;
@@ -436,6 +436,16 @@ void iommu_feature_enable(struct amd_iommu *iommu, u8 bit)
iommu_feature_set(iommu, 1ULL, 1ULL, bit);
}
+bool iommu_feature_enable_and_check(struct amd_iommu *iommu, u8 bit)
+{
+ u64 ctrl;
+
+ iommu_feature_enable(iommu, bit);
+
+ ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET);
+ return (ctrl & (1ULL << bit));
+}
+
static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
{
iommu_feature_set(iommu, 0ULL, 1ULL, bit);
@@ -3702,6 +3712,8 @@ static int __init parse_amd_iommu_options(char *str)
} else if (strncmp(str, "v2_pgsizes_only", 15) == 0) {
pr_info("Restricting V1 page-sizes to 4KiB/2MiB/1GiB");
amd_iommu_pgsize_bitmap = AMD_IOMMU_PGSIZES_V2;
+ } else if (strncmp(str, "viommu_disable", 14) == 0) {
+ amd_iommu_viommu = false;
} else {
pr_notice("Unknown option - '%s'\n", str);
}
diff --git a/drivers/iommu/amd/viommu.c b/drivers/iommu/amd/viommu.c
index 4626134893d6..5c744de729d5 100644
--- a/drivers/iommu/amd/viommu.c
+++ b/drivers/iommu/amd/viommu.c
@@ -45,6 +45,18 @@
LIST_HEAD(viommu_devid_map);
+static int viommu_enable(struct amd_iommu *iommu)
+{
+ /* The GstBufferTRPMode feature is checked by set and test */
+ if (!iommu_feature_enable_and_check(iommu, CONTROL_GSTBUFFERTRPMODE))
+ return -EINVAL;
+
+ iommu_feature_enable(iommu, CONTROL_VCMD_EN);
+ iommu_feature_enable(iommu, CONTROL_VIOMMU_EN);
+
+ return 0;
+}
+
static int viommu_init_pci_vsc(struct amd_iommu *iommu)
{
iommu->vsc_offset = pci_find_capability(iommu->dev, PCI_CAP_ID_VNDR);
@@ -298,6 +310,10 @@ int __init amd_viommu_init(struct amd_iommu *iommu)
set_iommu_dte(iommu);
+ ret = viommu_enable(iommu);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.34.1
next prev parent reply other threads:[~2026-03-30 8:44 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 8:41 [PATCH 00/22] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-03-30 8:41 ` [PATCH 01/22] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-03-30 9:39 ` Nicolin Chen
2026-03-30 8:41 ` [PATCH 02/22] iommu/amd: Introduce vIOMMU-specific events and event info Suravee Suthikulpanit
2026-03-30 9:34 ` Nicolin Chen
2026-04-06 3:25 ` Suthikulpanit, Suravee
2026-03-30 8:41 ` [PATCH 03/22] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-03-31 5:12 ` iommu/amd: Initialize IOMMU Private Address (IPA) space mapping region Weinan Liu
2026-04-06 8:32 ` Suthikulpanit, Suravee
2026-03-30 8:41 ` [PATCH 04/22] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-04-07 6:46 ` [PATCH 4/22] " Weinan Liu
2026-05-12 15:14 ` Suthikulpanit, Suravee
2026-03-30 8:41 ` [PATCH 05/22] iommu/amd: Introduce vIOMMU Guest-ID (GID) Suravee Suthikulpanit
2026-04-07 7:01 ` Weinan Liu
2026-05-12 15:07 ` Suthikulpanit, Suravee
2026-03-30 8:41 ` [PATCH 06/22] iommu/amd: Map vIOMMU VF MMIO and VF Control MMIO regions Suravee Suthikulpanit
2026-03-31 5:30 ` Weinan Liu
2026-04-06 8:57 ` Suthikulpanit, Suravee
2026-03-30 8:41 ` [PATCH 07/22] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-03-31 5:55 ` Weinan Liu
2026-04-06 9:03 ` Suthikulpanit, Suravee
2026-03-30 8:41 ` [PATCH 08/22] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-04-07 7:20 ` [PATCH 8/22] " Weinan Liu
2026-03-30 8:41 ` [PATCH 09/22] iommu/amd: Introduce domain for IOMMU Private Address (IPA) region Suravee Suthikulpanit
2026-03-30 12:20 ` Jason Gunthorpe
2026-04-06 3:48 ` Suthikulpanit, Suravee
2026-04-06 11:47 ` Jason Gunthorpe
2026-03-30 8:41 ` [PATCH 10/22] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-03-30 8:41 ` [PATCH 11/22] iommu/amd: Allocate and map vIOMMU private regions Suravee Suthikulpanit
2026-03-30 8:41 ` [PATCH 12/22] iommu/amd: Add helper functions to manage private address region for each VM Suravee Suthikulpanit
2026-03-30 8:41 ` [PATCH 13/22] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-03-30 8:41 ` [PATCH 14/22] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-03-30 8:41 ` [PATCH 15/22] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-03-30 12:17 ` Jason Gunthorpe
2026-04-06 3:49 ` Suthikulpanit, Suravee
2026-03-30 8:42 ` [PATCH 16/22] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-03-30 8:42 ` [PATCH 17/22] iommu/amd: Introduce vIOMMU Translation DTE Suravee Suthikulpanit
2026-03-30 8:42 ` [PATCH 18/22] iommufd: Introduce iommufd_viommu_ops.hw_queue_init Suravee Suthikulpanit
2026-03-30 8:42 ` [PATCH 19/22] iommu/amd: Add support for vIOMMU HW queues initialization Suravee Suthikulpanit
2026-03-30 8:42 ` [PATCH 20/22] iommufd: Introduce vIOMMU option via IOMMU_OPTION ioctl Suravee Suthikulpanit
2026-03-30 12:15 ` Jason Gunthorpe
2026-04-06 17:02 ` Suthikulpanit, Suravee
2026-03-30 8:42 ` [PATCH 21/22] iommu/amd: Handle set/get option for AMD vIOMMU hw_queue Suravee Suthikulpanit
2026-03-30 8:42 ` Suravee Suthikulpanit [this message]
2026-03-30 12:15 ` [PATCH 22/22] iommu/amd: Introduce logic to check and enable vIOMMU feature Jason Gunthorpe
2026-04-06 3:51 ` Suthikulpanit, Suravee
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