From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AC6A3B388D for ; Tue, 7 Apr 2026 14:05:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775570756; cv=none; b=klef0l38kvwmkKD6XnJgY4cs+Xa2lbR5iDxQQmxMC4x0FCZ5lqo2ohht+K9/KvBRy9m9am+nbrB9/FnTR62SipC8L43ALk9Bs49FwL4Ba0XaGUvtwZGdbxooplBF0pHyG9DICMxTuPurlJTxkFy+U0e5Fp47NT1gCnS7iB3sFSM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775570756; c=relaxed/simple; bh=RRjuRk6b2bjMAm+aczxT9dOHtZw8COA5gAq/N1ANU7c=; h=From:Subject:Date:Message-Id:MIME-Version:Content-Type:To:Cc; b=ZdvT/3vud+Vcy0Ucl6pnL0i95msecK0gQYIFm2L1S1QprhC5kTvW9NC3sOWlvpKZZmfNp6nEVS89wx82V75bG4StqM8oJMFjrHodmO6AP3PPlWtvSNhAGittOCOtYEwp6H9JgJytTfxUFmpXk/aIqV65RBzzUvb6CGUPlXn0G+Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ISG0JWhF; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ISG0JWhF" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488a041eae5so24460675e9.1 for ; Tue, 07 Apr 2026 07:05:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1775570753; x=1776175553; darn=vger.kernel.org; h=cc:to:content-transfer-encoding:mime-version:message-id:date :subject:from:from:to:cc:subject:date:message-id:reply-to; bh=X/r/MGY53zMFfOMSK7WGpq8A1pzaXpaNozArFN59i/g=; b=ISG0JWhF2dLGJGA8NBXI797imP8Epxmpvm2yjv2AqmAKSd9Lx8L2RrNJg7E0wktQmz NdTHIEv5QCapXYyBl94Ecme+i0Sf2eHXbfF5YaR+J80YGftpGPL6jvyCmCIehABLG1af +0/Ktp0WtbqvUtvUIgC3KEn9thn0oe5FG8k0sMjQIRxvp/uoPKdL3++1rZzv9rud0pBx ApYGBWck3aJBDi/PnSDtgyStbyIH1zJVa29h1WvqBxhtL/K9OHxllh8aEL2G46LdSBzK XPxTj2VOKvhI5JbBToXL5ZNvkCbL2x9G/h4i6SC39feDSEBSfXxEv49A0/XWpmDfxCvK 0rSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1775570753; x=1776175553; h=cc:to:content-transfer-encoding:mime-version:message-id:date :subject:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=X/r/MGY53zMFfOMSK7WGpq8A1pzaXpaNozArFN59i/g=; b=AjFT4U26+BZx3NjAqX78NIeqRBeA+xHl1o6RxL4TIRvWQpOcDVCj1KhdU8luXS0zqc ncTRnXKnOUeuUES+Oy0QDb+yTy239Ki/rT/wtAb36SLROND05eBiboCgDaMx9eOBNM4/ YYcJMxm+NBq3RwClPGFgY+OTjShmUnnt/ND5iA4+2k8/A67tVvZRdkIxEIrgfWfx5wtl nnxHSXk02uWu18mKxdGY8Diju0BSCoprKQjzFoVO9jzucFiYDjXrGNH068Ayn6hV7Jjw i6jT+9MHT5Sx68kKwEpWguJGzc1D0fv1LbHXr+tkjgjqdmD+sn9kVKHTLJFe14DoBT/j 1y3w== X-Forwarded-Encrypted: i=1; AJvYcCVaqaSQdGhw2kvrHgFcR/7QLCSSuQt/YDrQ+f+O8JBMKQRd4OG9evUTlDexqYQQm9hLhWWpAOI5MWo3R1U=@vger.kernel.org X-Gm-Message-State: AOJu0YxJOuPlUspRpJv24asdlt1cfjSDcJpDy9+Al6uV8qBJ31m0VH7s u/Du3qNvV5LhQ0QPqhpZ0q6193CUx1uEW7Tq8MMODAsv0wUgSZg98ofgtpyoCvtBoMc= X-Gm-Gg: AeBDietldN8ow41FmCLyomHs7+jt0F2EE7mA3q6vBjmwXt09V42LOs50jw4HfspuKaL ULGjxlTSAGU2Mh8Uk+Vi8C0S/lCDKYVbmdoOpoveAQmv9B1qRPGWXsYuVmfA4Un0G9TBfRzV6Vn MS8/SDn7WgahmAZ1F/eKze/ylOYl6ovAotWX+loV90NiQvaq16YbaAylJg6XQjH5/hEcgHaFdZT nMINwN4WWpfp7or6q+7dA+9zHk0O1RsLucuEc1Ji+ex8l+W7LxFA+8cKxwVfkDfIQa1oRDW0YZH ibzow7R00xLux/omVFUSGDTcShcmpZBuSzp9d4PSQ6P/MeMW/rpWT03RhmBHtyetIoJv2rDwbYh yUL6e76UuYnpmpyjxC8KKSv5JzHS6UP7gFH/5yO4LM/x+rap3cgdUUJJ1lhfwlwhULvUkSESIsC LuH9lY1Lb2m9BQVsY0hOP2WG4ZEGFKhqFF X-Received: by 2002:a05:600c:348d:b0:488:be21:54b9 with SMTP id 5b1f17b1804b1-488be2155c0mr42030555e9.8.1775570752688; Tue, 07 Apr 2026 07:05:52 -0700 (PDT) Received: from ho-tower-lan.lan ([185.48.77.170]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4887e822227sm626876145e9.4.2026.04.07.07.05.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Apr 2026 07:05:52 -0700 (PDT) From: James Clark Subject: [PATCH v2 0/6] perf arm_spe: Dump IMPDEF events Date: Tue, 07 Apr 2026 15:05:14 +0100 Message-Id: <20260407-james-spe-impdef-decode-v2-0-55d3ef997c48@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIABoP1WkC/3WNwQrCMBBEf6Xs2ZU0DRY9+R/SQ8hu2hWblESKU vLvxnr2+GaYNxtkTsIZLs0GiVfJEkMFfWjATTaMjEKVQSt9Ul3X4t3OnDEvtZgXYo/ELhIjnY3 xxpPzvoe6XhJ7ee3m21B5kvyM6b0fre03/TmN+u9cW1RoSVHXa6e1cteHBJviMaYRhlLKB12kc VC/AAAA To: John Garry , Will Deacon , Mike Leach , Leo Yan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Al Grant Cc: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, James Clark , Leo Yan X-Mailer: b4 0.14.0 In the Arm SPE raw data dump, IMPDEF events aren't printed. Add the ability to add names for some known events or print the raw event number for unknown events. For example: $ perf report -D ... ARM SPE data: size 0xd000 bytes 00000000: b0 18 c6 32 80 00 80 ff a0 PC 0xff80008032c618 el1 ns=1 00000009: 64 e7 42 00 00 CONTEXT 0x42e7 el1 0000000e: 00 00 00 00 00 PAD 00000013: 49 00 LD GP-REG 00000015: 52 16 10 EV RETIRED L1D-ACCESS TLB-ACCESS On N1 the event line becomes: 00000015: 52 16 10 EV RETIRED L1D-ACCESS TLB-ACCESS LATE-PREFETCH Or on other cores it becomes: 00000015: 52 16 10 EV RETIRED L1D-ACCESS TLB-ACCESS IMPDEF:12 Signed-off-by: James Clark --- Changes in v2: - Put MIDR in arm_spe_pkt (Leo) - Use for_each_set_bit() (Leo) - Use BIT_ULL() to fix 32bit builds (Ian) - Don't call strtol() with NULL (Ian) - Link to v1: https://lore.kernel.org/r/20260401-james-spe-impdef-decode-v1-0-ad0d372c220c@linaro.org --- James Clark (6): perf arm_spe: Make a function to get the MIDR perf arm_spe: Handle missing CPU IDs perf arm_spe: Store MIDR in arm_spe_pkt perf arm_spe: Turn event name mappings into an array perf arm_spe: Decode Arm N1 IMPDEF events perf arm_spe: Print remaining IMPDEF event numbers tools/perf/util/arm-spe-decoder/Build | 2 + tools/perf/util/arm-spe-decoder/arm-spe-decoder.c | 17 ++- tools/perf/util/arm-spe-decoder/arm-spe-decoder.h | 3 +- .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 144 ++++++++++++++------- .../util/arm-spe-decoder/arm-spe-pkt-decoder.h | 5 +- tools/perf/util/arm-spe.c | 62 ++++++--- 6 files changed, 158 insertions(+), 75 deletions(-) --- base-commit: 74e2dbe7be5037a5e5eed6bc1ad562747ac88566 change-id: 20260331-james-spe-impdef-decode-d944f4fdcff7 Best regards, -- James Clark