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Thu, 09 Apr 2026 01:32:05 -0700 (PDT) Received: from hu-kuldsing-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82cf9b5fb22sm29741277b3a.26.2026.04.09.01.32.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Apr 2026 01:32:04 -0700 (PDT) From: Kuldeep Singh Date: Thu, 09 Apr 2026 14:01:50 +0530 Subject: [PATCH v2 1/2] arm64: dts: qcom: kodiak: Add iface clock and power domain for ice sdhc Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260409-ice_emmc_clock_addition-v2-1-90bbcc057361@oss.qualcomm.com> References: <20260409-ice_emmc_clock_addition-v2-0-90bbcc057361@oss.qualcomm.com> In-Reply-To: <20260409-ice_emmc_clock_addition-v2-0-90bbcc057361@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kuldeep Singh X-Mailer: b4 0.15.1 X-Authority-Analysis: v=2.4 cv=TL51jVla c=1 sm=1 tr=0 ts=69d76406 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=zChIi_bjjUXeECqr7xMA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-ORIG-GUID: U3BKQCdT5Ndr9EW80eKM4x1wUylGuYSI X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDA5MDA3NSBTYWx0ZWRfX/PXJoFy8BH3a LhT9KEI0sWUcl1UUwb39lKPArGJJZOMrItUiiyFGLAQ6/L1Ny1sGN2OTjcRdafjiuQZJiG1ZaUK lmfCC3F6PL1HYCnWhCUuE6u7mNmQRAiVUjc5fQAesIkIrboDLPluk6ZuEMUvh1opjtEVYV6LCT5 V6Whhf24vBRXj1iAh3luDldzKsCCBoJ+UN5iaeAg8Hgk85/wgNWXYI5dXSo+Af5KxDhId1OgjpO 4NJftgVG1N7oA0d52i502IPS+2WFgIJW5fGJIPytTZt3CBm8dfLRmt6k321fzBv5HeFkkXl01mJ Jx8BchXnHDuxZQqSpqJdJ8pFr8tDjM2uqLxBYl9c2lnYxQGVkIzctbCogiJ7pTZ+iOb335rbt7a 6x46d7IvfYACaQl0qSTEZdkI+PWWGpQPn++RZ96jyx3ZiZeyAIJ8yda2Ys5A2oED7wuJKbktDbU AjxukEO7g1GbHNblp0w== X-Proofpoint-GUID: U3BKQCdT5Ndr9EW80eKM4x1wUylGuYSI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-09_02,2026-04-08_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 adultscore=0 spamscore=0 suspectscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604090075 Qualcomm in-line crypto engine (ICE) platform driver specifies and votes for its own resources. Before accessing ICE hardware during probe, to avoid potential unclocked register access issues (when clk_ignore_unused is not passed on the kernel command line), in addition to the 'core' clock the 'iface' clock should also be turned on by the driver. This can only be done if power domain is enabled. Specify both power domain and the iface clock. Signed-off-by: Kuldeep Singh --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi index dda4697a61b7..a8260f695058 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -1082,7 +1082,11 @@ sdhc_ice: crypto@7c8000 { compatible = "qcom,sc7280-inline-crypto-engine", "qcom,inline-crypto-engine"; reg = <0x0 0x007c8000 0x0 0x18000>; - clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>; + clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, + <&gcc GCC_SDCC1_AHB_CLK>; + clock-names = "core", + "iface"; + power-domains = <&rpmhpd SC7280_CX>; }; gpi_dma0: dma-controller@900000 { -- 2.34.1