From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 887CB36494C for ; Thu, 9 Apr 2026 13:54:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.92.199 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775742887; cv=none; b=IISVal/BVsG7zfScNICDCrlw/U4rxx4IN2j0XNIULtzv8tlx0o1+27+7u6GtTvHS8Zo2boDjlNm45jEEP/7I+5xfaT2remwHSTuWk4UZaaRWiTGHDI8kQmTRZRcqP5SGDD2sGFHWt5mdImsfzkGqrDeJtZ2CK9++IFBbB4mpJBk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775742887; c=relaxed/simple; bh=IsRXIHt56BFpg/By0E4ccQc75RwSgkR4m1nyiGyhEc0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=LUAiwQ+MiyyqebMdr77DY8KGd7UgkjYdLWcz8BGNUM38mlwhnL57B07UX9SPWgh5W7O1++0bdj1ENcsubuHelykPVvu5DrtIjBaOqSFkrLUV4AOWVrN2faFdu8ca+eHOq01Mob+8sDrB4npwgdStD5/uUGHtg6w6E12x93p+dvg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=SolS4mXB; arc=none smtp.client-ip=90.155.92.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="SolS4mXB" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=DSHQULBdB4TV9I6eRGSeUoJa8qwSi8WEmvKS0ViV3JY=; b=SolS4mXBm0teVk2yOxzWyOy9ys 2gH994JamuF4z0lHISFIo/ZawKcZpiBJ7bj9XRHzn5ugFawtStPcbgzJIrmV13SHlMChaJyV4SxOu 9LnYKbWLy2B5rUFXHETtLCywgmo9nUNQM1ofgI01WagYpeqt7nFLhUkzmZwLOuePJosmaQyx3Y/6q bSKga1+iuAzpVf9+4JcVxL7VURVIb5YdDBwP8Hp7tRu5gx4aydxZJnjZqQss+Kp1/isZS/r+ATCMm AHVEJJ9qx4GHjuTtYCNNWmBtZvwweCuaZxXZo8zXn9eRcZIVv7bBDAcMYps7cau4GPQ6Mit7FKkLR mA9FYp0g==; Received: from 77-249-17-252.cable.dynamic.v4.ziggo.nl ([77.249.17.252] helo=noisy.programming.kicks-ass.net) by desiato.infradead.org with esmtpsa (Exim 4.98.2 #2 (Red Hat Linux)) id 1wAppo-0000000Bpa2-0drI; Thu, 09 Apr 2026 13:54:16 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 73D18302431; Thu, 09 Apr 2026 15:54:15 +0200 (CEST) Date: Thu, 9 Apr 2026 15:54:15 +0200 From: Peter Zijlstra To: Tim Chen Cc: Ingo Molnar , K Prateek Nayak , "Gautham R . Shenoy" , Vincent Guittot , Juri Lelli , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Madadi Vineeth Reddy , Hillf Danton , Shrikanth Hegde , Jianyong Wu , Yangyu Chen , Tingyin Duan , Vern Hao , Vern Hao , Len Brown , Aubrey Li , Zhao Liu , Chen Yu , Chen Yu , Adam Li , Aaron Lu , Tim Chen , Josh Don , Gavin Guo , Qais Yousef , Libo Chen , linux-kernel@vger.kernel.org Subject: Re: [Patch v4 00/22] Cache aware scheduling Message-ID: <20260409135415.GE3126523@noisy.programming.kicks-ass.net> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Apr 01, 2026 at 02:52:12PM -0700, Tim Chen wrote: > Chen Yu (10): > sched/cache: Limit the scan number of CPUs when calculating task > occupancy > sched/cache: Record per LLC utilization to guide cache aware > scheduling decisions > sched/cache: Introduce helper functions to enforce LLC migration > policy > sched/cache: Disable cache aware scheduling for processes with high > thread counts > sched/cache: Avoid cache-aware scheduling for memory-heavy processes > sched/cache: Enable cache aware scheduling for multi LLCs NUMA node > sched/cache: Allow the user space to turn on and off cache aware > scheduling > sched/cache: Add user control to adjust the aggressiveness of > cache-aware scheduling > > Peter Zijlstra (Intel) (1): > sched/cache: Introduce infrastructure for cache-aware load balancing > > Tim Chen (11): > sched/cache: Make LLC id continuous > sched/cache: Assign preferred LLC ID to processes > sched/cache: Track LLC-preferred tasks per runqueue > sched/cache: Introduce per CPU's tasks LLC preference counter > sched/cache: Calculate the percpu sd task LLC preference > sched/cache: Count tasks prefering destination LLC in a sched group > sched/cache: Check local_group only once in update_sg_lb_stats() > sched/cache: Prioritize tasks preferring destination LLC during > balancing > sched/cache: Add migrate_llc_task migration type for cache-aware > balancing > sched/cache: Handle moving single tasks to/from their preferred LLC > sched/cache: Respect LLC preference in task migration and detach I've applied a random subset of patches with random edits into queue.git sched/cache (based on tip/sched/core). It builds, but is otherwise untested. Please send patches against this tree; I'm hoping to stick this into sched/core after the next merge window. If any one commit really needs amending, just send a replacement patch and I'll rebase. Just make sure to not loose the edits I made.