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[129.46.232.65]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8ac84cb135fsm19223386d6.38.2026.04.10.02.33.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Apr 2026 02:33:53 -0700 (PDT) From: Yongxing Mou Subject: [PATCH v4 00/39] drm/msm/dp: Add MST support for MSM chipsets Date: Fri, 10 Apr 2026 17:33:35 +0800 Message-Id: <20260410-msm-dp-mst-v4-0-b20518dea8de@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAPTD2GkC/22Q3YrCQAxGX6XM9UbSzu+WZdn3WETSdKoDjq1NF UF89x3rXnqTcD7ISchdSZxTFNVWdzXHa5I0ngqYj0rxgU77CKkvrBpsHJoaIUuGfiptAW1rjZ2 LoQtGlYFpjkO6rbLf7YvneL4U5/IKVY4itDrb6mtVarSQe5Ed00LHcQ9XCwjonA/E+pPY/4wim /OFjjzmvCnl+7nrjak2cJh6KEcQL+P8b+JgLHrte2femzqSCM8kLW2l44AhdMjW+4bc4K3TJlp DpM1gB0ZquLyB1fbx+ANG/qdzPAEAAA== X-Change-ID: 20260410-msm-dp-mst-35130b6e8b84 To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Jessica Zhang Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Yongxing Mou , Abhinav Kumar , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1775813628; l=8264; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=VLbxJZyiqPOlcQwp522UmmsB0ILjUkfDxXbP24S7/7I=; b=IsVAU+0TOM8w8dM+RqEeAPCIf8Dy1XJK/OdKbgPpL3XT2Toeq6Kls69fYwed+lhRBBY3LQyMw 8E7nsM2v8qHA/UU7v8M3z4/dALgIHOoDKHL+cQU4nKBo/LFzbv1b99n X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDEwMDA4OCBTYWx0ZWRfX+hCNbWQffkLr Uknuc7q335EHXgFBnHdutoxLAVy6+166+Y1PQ3OMjJUfPGMDggNjwv+wIh3XNxPBQJTAQyM8HZV yh+kCfawN3J7kmXgChn+QkotE8FK4BdA/ttbDCoa0JIVQA4tfzyATxfAPu7sEvYaAHuubyFX0bK wyqpAgG873jfFHpmpKun1OtitM3LiL8WTUnWVqZS+A5Jlpo4yFkGeYrjY8Kg14TWY9vWvcbe54Q cFVDKCA+drYbT+KTPDYbV8wz1qfcc0dyxrXkQlzwePqQc0q8DrInKv7bQUBMcX/yMH6EvVm9Vg9 GxI6MH4v8CSDN4undNr4su0LzX/9OekyqcOtB1Jh5Aa8vTvQFYhlFoZeI2bwhV8nEUGyVsJE1iL nWngc+i+qT+2SBzJDtVgb+LSYzhDWEDs85Ax1RgjFCWKNMhbz5Dp/7LM4bOMV8CRqLZSgdqp9IG NtWiGJWSLXSNETH/oFg== X-Proofpoint-ORIG-GUID: IVEW5OjI7gs4Ym194zOe16FSp7gJmHJw X-Proofpoint-GUID: IVEW5OjI7gs4Ym194zOe16FSp7gJmHJw X-Authority-Analysis: v=2.4 cv=BJyDalQG c=1 sm=1 tr=0 ts=69d8c402 cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=e5mUnYsNAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=dsUC2Tdhv4dzEw9V6FUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 a=Vxmtnl_E_bksehYqCbjh:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-10_03,2026-04-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 phishscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604100088 Add support for Multi-stream transport for MSM chipsets that allow a single instance of DP controller to send multiple streams. This series has been validated on sa8775p ride platform using multiple MST dongles and also daisy chain method on both DP0 and DP1 upto 1080P. With 4x4K monitors, due to lack of layer mixers that combination will not work but this can be supported as well after some rework on the DPU side. In addition, SST was re-validated with all these changes to ensure there were no regressions. This patch series was made on top of: [1] : https://patchwork.freedesktop.org/series/151522/ (v5 to fix up HPD) Overall, the patch series has been organized in the following way: 1) First set are a couple of fixes made while debugging MST but applicable to SST as well so go ahead of everything else 2) Prepare the DP driver to get ready to handle multiple streams. This is the bulk of the work as current DP driver design had to be adjusted to make this happen. 3) Finally, new files to handle MST related operations Note: Validation for this series has so far been done on the latest linux-next on LeMans, covering both FB console and Weston. Broader validation, including additional Type-C DP use cases, is still in progress and may lead to some follow-up adjustments in the next revision. I wanted to post the current version first to collect early feedback on the overall approach. Signed-off-by: Yongxing Mou --- Changes in v4: - Fixed most comments from V3. - Rebase onto HPD refactor V5. - Fixed casing/formatting issues, for example: “mst”. - Drop .mode_set() and set_mode in .atomic_enable(). - Rewrite commit messages that are unclear. - Use the same API for MST link and SST link writes. - Use the new drm_dp_dpcd_read_byte() / drm_dp_dpcd_write_byte() interfaces. - Remove some unnecessary payload fields from the MST bridge. - Remove some defensive NULL pointer checks. - Reworked the patch order to make the series easier to follow. - Add support for more platforms. - Link to v3: https://lore.kernel.org/r/20250825-msm-dp-mst-v3-0-01faacfcdedd@oss.qualcomm.com Changes in v3: Fixed review comments from Dmitry - Fixed lots of comments from series V1/V2. - Rebased onto next-20250808. - Rebased onto Jessica's HPD-refactor branch. - Fixed formatting issues in commit messages under changes. - Removed unnecessary one-line wrappers. - Relocated MST-related .atomic_check() calls to their appropriate positions. - Removed the logic related to slot checking in .mode_valid(). - Link to v2: https://lore.kernel.org/r/20250609-msm-dp-mst-v2-0-a54d8902a23d@quicinc.com Changes in v2: Fixed review comments from Dmitry - Rebase on top of next-20250606 - Add all 4 streams pixel clks support and MST2/MST3 Link clk support - Address the formatting issues mentioned in the review comments - Drop the cache of msm_dp_panel->drm_edid cached - Remove the one-line wrapper funtion and redundant conditional check - Fixed the commit messgae descriptions of some patches - Reordered the patches and renamed some functions and variables - Link to v1: https://lore.kernel.org/all/20241205-dp_mst-v1-0-f 8618d42a99a@quicinc.com/ Signed-off-by: Yongxing Mou --- Abhinav Kumar (26): drm/msm/dp: break up dp_display_enable into two parts drm/msm/dp: re-arrange dp_display_disable() into functional parts drm/msm/dp: allow dp_ctrl stream APIs to use any panel passed to it drm/msm/dp: split dp_ctrl_off() into stream and link parts drm/msm/dp: make bridge helpers use dp_display to allow re-use drm/msm/dp: separate dp_display_prepare() into its own API drm/msm/dp: introduce stream_id for each DP panel drm/msm/dp: introduce max_streams for DP controller MST support drm/msm/dp: Add support for programming p1/p2/p3 register blocks drm/msm/dp: use stream_id to change offsets in dp_catalog drm/msm/dp: add support to send ACT packets for MST drm/msm/dp: Add support to enable MST in mainlink control drm/msm/dp: no need to update tu calculation for mst drm/msm/dp: Add support for MST channel slot allocation drm/msm/dp: Add support for sending VCPF packets in DP controller drm/msm/dp: Always program MST_FIFO_CONSTANT_FILL for MST use cases drm/msm/dp: abstract out the dp_display stream helpers to accept a panel drm/msm/dp: replace power_on with active_stream_cnt for dp_display drm/msm/dp: Mark the SST bridge disconnected when mst is active drm/msm/dp: add an API to initialize MST on sink side drm/msm/dp: add dp_display_get_panel() to initialize DP panel drm/msm/dp: initialize dp_mst module for each DP MST controller drm/msm/dp: add dp_mst_drm to manage DP MST bridge operations drm/msm/dp: add connector abstraction for DP MST drm/msm/dp: add HPD callback for dp MST drm/msm/dpu: use msm_dp_get_mst_intf_id() to get the intf id Yongxing Mou (13): drm/msm/dp: remove cached drm_edid from panel drm/msm/dp: drop deprecated .mode_set() and use .atomic_enable drm/msm/dp: splite msm_dp_ctrl_config_ctrl() into link parts and stream parts drm/msm/dp: extract MISC1_MISC0 configuration into a separate function drm/msm/dp: split link setup from source params drm/msm/dp: move the pixel clock control to its own API drm/msm/dp: Add catalog support for 3rd/4th stream MST drm/msm/dp: simplify link and clock disable sequence drm/msm/dp: pass panel to display enable/disable helpers drm/msm/dp: add prepared to manage link-level operations drm/msm/dpu: initialize encoders per stream for DP MST drm/msm/dp: wire MST helpers into atomic check and commit paths drm/msm/dp: Add MST stream support for supported DP controllers drivers/gpu/drm/msm/Makefile | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 20 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 30 +- drivers/gpu/drm/msm/dp/dp_audio.c | 2 +- drivers/gpu/drm/msm/dp/dp_ctrl.c | 822 +++++++++++++++++++++------- drivers/gpu/drm/msm/dp/dp_ctrl.h | 24 +- drivers/gpu/drm/msm/dp/dp_display.c | 598 ++++++++++++++------ drivers/gpu/drm/msm/dp/dp_display.h | 31 +- drivers/gpu/drm/msm/dp/dp_drm.c | 43 +- drivers/gpu/drm/msm/dp/dp_drm.h | 12 - drivers/gpu/drm/msm/dp/dp_mst_drm.c | 795 +++++++++++++++++++++++++++ drivers/gpu/drm/msm/dp/dp_mst_drm.h | 14 + drivers/gpu/drm/msm/dp/dp_panel.c | 315 +++++++---- drivers/gpu/drm/msm/dp/dp_panel.h | 32 +- drivers/gpu/drm/msm/dp/dp_reg.h | 48 +- drivers/gpu/drm/msm/msm_atomic.c | 9 +- drivers/gpu/drm/msm/msm_drv.h | 18 + drivers/gpu/drm/msm/msm_kms.c | 2 + 19 files changed, 2300 insertions(+), 520 deletions(-) --- base-commit: 3ef088b0c5772a6f75634e54aa34f5fc0a2c041c change-id: 20260410-msm-dp-mst-35130b6e8b84 prerequisite-message-id: <20260305-mdss_catalog-v5-0-06678ac39ac7@oss.qualcomm.com> prerequisite-patch-id: 8b3f7f40025e7a10c4646435e9cfec4f9e275871 prerequisite-patch-id: 547db98962f20218380e966b976aede824ff8433 prerequisite-message-id: <20260314-hpd-refactor-v5-0-0c8450737d64@oss.qualcomm.com> prerequisite-patch-id: 1867c344ef6ead1034523ba65d2640f9ad0606cd prerequisite-patch-id: a58ebaf429385c622869c83e83ce7ffdfe9ea27e prerequisite-patch-id: d0f570e57559248ba6ca733f96fdb02af29f3055 prerequisite-patch-id: 44d390f5319068ad534c4be698dd8dba99c0bfd1 prerequisite-patch-id: 85438690573583cf62065f43531dbb4e221e9dd0 prerequisite-patch-id: b37db0f0b10f16ed45ab056aa87f2275bb02df94 prerequisite-patch-id: dcccd204ee8a979328719d41334453474bcfdf98 prerequisite-patch-id: db07c3aa80a597c91ae2329bc677bfd72b63716a prerequisite-patch-id: 9778cc1ab60a0870a74d58ff220bb01011fdf1c0 prerequisite-patch-id: 95692a605647e51bdaf8d5b2e61635a6978121f0 Best regards, -- Yongxing Mou