From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4D6A23A3E96 for ; Fri, 10 Apr 2026 07:43:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775807009; cv=none; b=ep3E9p+EOESMbGHEyGCA5jQr3H0j+Ic/sUoJP0V1e3/c7KWZHOyyZKrI5VSMc3PNrZZ5wqJWMQ4wvWuXLMfJf+yToeQ6/0ThhKR+8uhSfqd9/Q4ThJWXw/oSkCmzHPfjLebLdI3fBUGkJwThzvJzWrF3PjyB1KFyii2G4LdgI6k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775807009; c=relaxed/simple; bh=8XFLEr4RjkIbOMHI8BNKmOuUJajcoGM2yQX5wwpEPts=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=I3WojS9PXgwcq+aeeU4WXX8cfzresXmbx4V4j61hXfhLqOdS029OfPEOx9VXFqGR5fYewqWaSnJ7ravEzOKyavig+VLv3h5KZ47FvhQqmdF3GNIVI8aDCA0YR+NCBUQXvjrD6rsTr8WV8MJof0eWYk335Xx7rwkc7wlkp3UUQi8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=t9DPntFD; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="t9DPntFD" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 50FF21CE2; Fri, 10 Apr 2026 00:43:22 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A56C43FAF5; Fri, 10 Apr 2026 00:43:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1775807008; bh=8XFLEr4RjkIbOMHI8BNKmOuUJajcoGM2yQX5wwpEPts=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=t9DPntFDVPtLU1DlDlZeGGS/oKtnFMbbOTEmrmMqtCAVmBh6qRAKwNTauDfTMxKDc sMhU9/IbPZNTq8XbOTV8KD4+d2qlHrUb8XQoB67EVJskX/zTiUzavlFp7oLRORovUy a2uB5Muo82s+MCoZGizckyhX1ZmI/oJIHl7NsgJc= From: Yeoreum Yun To: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: suzuki.poulose@arm.com, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, leo.yan@arm.com, Yeoreum Yun Subject: [PATCH v2 5/5] coresight: etm3x: fix inconsistencies with sysfs configration Date: Fri, 10 Apr 2026 08:43:10 +0100 Message-Id: <20260410074310.2693385-6-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260410074310.2693385-1-yeoreum.yun@arm.com> References: <20260410074310.2693385-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The current ETM3x configuration via sysfs can lead to the following inconsistencies: - If a configuration is modified via sysfs while a perf session is active, the running configuration may differ between before a sched-out and after a subsequent sched-in. To resolve these inconsistencies, the configuration should be separated into: - active_config, which is applied configuration for the current session - config, which stores the settings configured via sysfs. and apply configuration after taking a mode. Signed-off-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-etm.h | 2 ++ .../coresight/coresight-etm3x-core.c | 20 ++++++++++++------- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h index 6fda26039db8..9ed5e2361be1 100644 --- a/drivers/hwtracing/coresight/coresight-etm.h +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -241,6 +241,7 @@ struct etm_config { * @boot_enable:true if we should start tracing at boot time. * @os_unlock: true if access to management registers is allowed. * @traceid: value of the current ID for this component. + * @active_config: structure holding current running configuration parameters. * @config: structure holding configuration parameters. */ struct etm_drvdata { @@ -256,6 +257,7 @@ struct etm_drvdata { bool boot_enable; bool os_unlock; u32 traceid; + struct etm_config active_config; struct etm_config config; }; diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c index b7e977defb1c..0afe2275aa27 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c @@ -308,7 +308,7 @@ void etm_config_trace_mode(struct etm_config *config) static int etm_parse_event_config(struct etm_drvdata *drvdata, struct perf_event *event) { - struct etm_config *config = &drvdata->config; + struct etm_config *config = &drvdata->active_config; struct perf_event_attr *attr = &event->attr; u8 ts_level; @@ -368,7 +368,7 @@ static int etm_enable_hw(struct etm_drvdata *drvdata) int i, rc; u32 etmcr; const struct etm_caps *caps = &drvdata->caps; - struct etm_config *config = &drvdata->config; + struct etm_config *config = &drvdata->active_config; struct coresight_device *csdev = drvdata->csdev; CS_UNLOCK(drvdata->csa.base); @@ -442,24 +442,30 @@ static int etm_enable_hw(struct etm_drvdata *drvdata) struct etm_enable_arg { struct etm_drvdata *drvdata; + u32 traceid; int rc; }; static void etm_enable_sysfs_smp_call(void *info) { struct etm_enable_arg *arg = info; + struct etm_drvdata *drvdata; struct coresight_device *csdev; if (WARN_ON(!arg)) return; - csdev = arg->drvdata->csdev; + drvdata = arg->drvdata; + csdev = drvdata->csdev; if (!coresight_take_mode(csdev, CS_MODE_SYSFS)) { /* Someone is already using the tracer */ arg->rc = -EBUSY; return; } + drvdata->active_config = drvdata->config; + drvdata->traceid = arg->traceid; + arg->rc = etm_enable_hw(arg->drvdata); /* The tracer didn't start */ @@ -514,14 +520,13 @@ static int etm_enable_sysfs(struct coresight_device *csdev, struct coresight_pat spin_lock(&drvdata->spinlock); - drvdata->traceid = path->trace_id; - /* * Configure the ETM only if the CPU is online. If it isn't online * hw configuration will take place on the local CPU during bring up. */ if (cpu_online(drvdata->cpu)) { arg.drvdata = drvdata; + arg.traceid = path->trace_id; ret = smp_call_function_single(drvdata->cpu, etm_enable_sysfs_smp_call, &arg, 1); if (!ret) @@ -564,7 +569,7 @@ static int etm_enable(struct coresight_device *csdev, struct perf_event *event, static void etm_disable_hw(struct etm_drvdata *drvdata) { int i; - struct etm_config *config = &drvdata->config; + struct etm_config *config = &drvdata->active_config; struct coresight_device *csdev = drvdata->csdev; CS_UNLOCK(drvdata->csa.base); @@ -882,7 +887,8 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id) if (etm_arch_supported(drvdata->arch) == false) return -EINVAL; - etm_set_default(&drvdata->config); + etm_set_default(&drvdata->active_config); + drvdata->config = drvdata->active_config; pdata = coresight_get_platform_data(dev); if (IS_ERR(pdata)) -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}