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Fri, 10 Apr 2026 11:42:50 -0700 (PDT) Received: from hu-mojha-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82f0c32e744sm4036922b3a.13.2026.04.10.11.42.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Apr 2026 11:42:50 -0700 (PDT) From: Mukesh Ojha To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Mukesh Ojha Subject: [PATCH 12/35] arm64: dts: qcom: sm8150: Fix PDC reg size to single APSS DRV region Date: Sat, 11 Apr 2026 00:10:49 +0530 Message-ID: <20260410184124.1068210-13-mukesh.ojha@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com> References: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: 66F4d5au1Go3RRMiAZg7De_aJzBjn29U X-Authority-Analysis: v=2.4 cv=b9aCJNGx c=1 sm=1 tr=0 ts=69d944ac cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=oy73fdSuVNde8ymsYewA:9 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-ORIG-GUID: 66F4d5au1Go3RRMiAZg7De_aJzBjn29U X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDEwMDE3NCBTYWx0ZWRfX9EnNekf729Hx VlRBDZGKivVxUEpGttI5FWFpZPB6SvFzWFbgANHUkIByPUcfBG4yegS6qVxhvb4xH2CtVkj3aYe dVBcFgX9KSf030TngHM8RLYWG757q0FewQnDcTXlMb9V1jUdkbieSSebMi1hfPuSulIQftPcF6F LEMjk3RUv644XYpqJGAcKgcQfraCCuqau3VEhETDHjeRxvvuOkp3/woDVM842zcIXO1lDf5UPgP Ol6VHaYANNvJo7E1a0Ik5ILS9gHLUs9Cewm0+OZLGRFkC0cB/6g63J/bXM7f3jFwLrM6ZZY5qg/ GhS+1P0RClpotuZrHCco+FaxVLWGmPJ2dQkAcRr/2xEQCx8psk3ypBfvlhtBQ3LXe/79dRtiQFC pt1r2L7LqcyFQKCU0Jomm/AqAn81bN2E5zWaIcpC16oyH1pmNsg20boi2gNgn4+ZcXK0ZSuIK0r eJOsdQlyt9++pLbSOUw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-10_05,2026-04-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 impostorscore=0 adultscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604100174 The PDC reg size was 0x30000, covering three DRV regions. Linux only needs the APSS DRV region which is a single 0x10000 window. Reduce the size to 0x10000 to describe only the region actually used. Signed-off-by: Mukesh Ojha --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 97ca5275d740..805fa76e6647 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -4174,7 +4174,7 @@ dispcc: clock-controller@af00000 { pdc: interrupt-controller@b220000 { compatible = "qcom,sm8150-pdc", "qcom,pdc"; - reg = <0 0x0b220000 0 0x30000>; + reg = <0 0x0b220000 0 0x10000>; qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; #interrupt-cells = <2>; -- 2.53.0