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Fri, 10 Apr 2026 11:42:22 -0700 (PDT) Received: from hu-mojha-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82f0c32e744sm4036922b3a.13.2026.04.10.11.42.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Apr 2026 11:42:22 -0700 (PDT) From: Mukesh Ojha To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Mukesh Ojha Subject: [PATCH 05/35] irqchip/qcom-pdc: Add PDC_VERSION() macro to describe version register fields Date: Sat, 11 Apr 2026 00:10:42 +0530 Message-ID: <20260410184124.1068210-6-mukesh.ojha@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com> References: <20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: 4DwcaRemJI2AnxRO-8gZ8k_7zM9NBqTS X-Proofpoint-GUID: 4DwcaRemJI2AnxRO-8gZ8k_7zM9NBqTS X-Authority-Analysis: v=2.4 cv=H/brBeYi c=1 sm=1 tr=0 ts=69d94490 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=VeW31bOOL8eyMvC__NIA:9 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDEwMDE3NSBTYWx0ZWRfX0V8rovfqs5KA eOdBfG2Mrzz45HbAMArZ9DMjvqHMuUZSxphFzJabLTiWjlYHYMIkGH7VSDZjn+zPBVJMG3iNE0U y/ogaHZDPALhWu8dZZIwV6DG4NSJSIwNydbQlHHHWzXPgxMQ2e9LmPCOD+ZGwzinjkDbo3qCQqn 0bDoAWEIQU37hGUbq7mPIa73SDZ3p8p/4LdKYvsWB6l9U1K0CquL46ckjRh3U1zlHZf7LBWQSa3 5dJNBkGtdhEFt9ftNdR/IvjW6y0skFAZl3RpuMLkPJPqHsJHIAmyhq7KzxDj3FSJHHa3i4rXjTx AHbKdC8Zp54j/xlnboHHPb0qpdbQfhz01bU1FpEjZas/BScmbg/9lhHUyhRTCFDB5HfsGc0lKHW 9bz+LmZh9RGGH9Tk07+hZ0XibUZfBqMzn4YoEFGSNIBQRGaIjFl7CJIx6lvApwA0P10AiEfeILD ArwXze1WIcPAmKgeCgg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-10_05,2026-04-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 bulkscore=0 impostorscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604100175 The PDC hardware version register encodes major, minor and step fields in byte-sized fields at bits [23:16], [15:8] and [7:0] respectively. The existing PDC_VERSION_3_2 constant was a bare magic number (0x30200) with no indication of this encoding. Add GENMASK-based field definitions for each sub-field and a PDC_VERSION(maj, min, step) constructor macro using FIELD_PREP, making the encoding self-documenting. Replace the magic constant with PDC_VERSION(3, 2, 0). Signed-off-by: Mukesh Ojha --- drivers/irqchip/qcom-pdc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 734576cdce0c..5e1553334103 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -3,6 +3,7 @@ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -34,9 +35,16 @@ #define IRQ_i_CFG_TYPE_MASK GENMASK(2, 0) #define PDC_VERSION_REG 0x1000 +#define PDC_VERSION_MAJOR GENMASK(23, 16) +#define PDC_VERSION_MINOR GENMASK(15, 8) +#define PDC_VERSION_STEP GENMASK(7, 0) +#define PDC_VERSION(maj, min, step) \ + (FIELD_PREP(PDC_VERSION_MAJOR, (maj)) | \ + FIELD_PREP(PDC_VERSION_MINOR, (min)) | \ + FIELD_PREP(PDC_VERSION_STEP, (step))) /* Notable PDC versions */ -#define PDC_VERSION_3_2 0x30200 +#define PDC_VERSION_3_2 PDC_VERSION(3, 2, 0) struct pdc_pin_region { u32 pin_base; -- 2.53.0