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Tue, 14 Apr 2026 02:31:47 -0700 (PDT) Received: from hu-pkambar-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82f0c35194asm17321642b3a.20.2026.04.14.02.31.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2026 02:31:46 -0700 (PDT) From: palash.kambar@oss.qualcomm.com To: mani@kernel.org, James.Bottomley@HansenPartnership.com, martin.petersen@oracle.com, bvanassche@acm.org, shawn.lin@rock-chips.com Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, nitin.rawat@oss.qualcomm.com, Palash Kambar Subject: [PATCH V3 0/2] Add post change sequence for link start notify Date: Tue, 14 Apr 2026 15:01:33 +0530 Message-Id: <20260414093135.660725-1-palash.kambar@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE0MDA4OCBTYWx0ZWRfX61gX3HU0EDAA U7c4lts8Q0xF9okNDZ7jV19ClWZCNcqHgv6eRxuyai7I1PMgODdv/nYCTyUw8yzsYVR4wC0rA9g z1pi7mYvtoy5jxQZELzbYE5Cxiwa5E/N0eS4fzA7E8rWrjnmWL0FBEPdqYb69/G2yC2u73Cwxh2 Fe+uwryw3oHrQSESUR6TirbCqJ4wwujxUfa627oDZrPTy0XW3nqbD6Gs91+uNT/4h639yPZiot8 uDb9QdHVe8Q6XuQSAmMbJK9nKEik6oHVnoNpTyXU1WqcZjPFel7AhYLIloXCtHuoEJ8ujLZDiRr KcT6nQeKvG6BfLUKI0ivz/yigepmS/t7XCKe0klnpBdDFKpgeT0NwArIgyx+WkJxpG4iFQ8YfVh R7QNHf+C3Ud6PC3jcXzVy0bKpx3FPuSWXupnQV8UZlqxfTVwgNXzbfLZo6UsTek1m3IjCx0WYNu PTp/UNYb/INOorJRblA== X-Authority-Analysis: v=2.4 cv=MahcfZ/f c=1 sm=1 tr=0 ts=69de0984 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=rbNoiXgGD7Sd92Kb1yEA:9 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-ORIG-GUID: tx4uqQDtock5kSt4nzx1LnF3CgIZdWtb X-Proofpoint-GUID: tx4uqQDtock5kSt4nzx1LnF3CgIZdWtb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-14_02,2026-04-13_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 adultscore=0 impostorscore=0 priorityscore=1501 phishscore=0 suspectscore=0 malwarescore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604140088 From: Palash Kambar This patch series introduces two updates to the UFS subsystem aimed at improving link stability and power efficiency on platforms using the Qualcomm UFS host controller. During link startup, the number of connected TX/RX lanes discovered may be fewer than the lanes specified in the device tree. The current UFS core driver configures all DT-defined lanes unconditionally, which can lead to mismatches during power mode changes. Patch 1/2 ensures to fail on this. Additionally, certain Qualcomm platforms support Auto Hibern8 (AH8), where the UFS controller autonomously de-asserts clk_req signals to the GCC during Hibern8 state. Enabling this mechanism allows the clock controller to gate unused clocks, providing meaningful power savings. Patch 2/2 adds support for enabling this feature as recommended by the Hardware Programming Guidelines. --- changes from V1 1) Addressed Shawn Lin's comments to fix comment to connected lanes. 2) Addressed Bart's comments to remove warning and trigger failure incase of lane mismatch. changes from V2: 1) Addressed Shawn's comments to fix commit text. 2) Addressed Bart's comments to remove variable initializations and indentation fix. Palash Kambar (2): ufs: core: Configure only active lanes during link ufs: ufs-qcom: Enable Auto Hibern8 clock request support drivers/ufs/core/ufshcd.c | 37 +++++++++++++++++++++++++++++++++++++ drivers/ufs/host/ufs-qcom.c | 10 ++++++++++ drivers/ufs/host/ufs-qcom.h | 11 +++++++++++ 3 files changed, 58 insertions(+) -- 2.34.1