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Thu, 16 Apr 2026 06:44:41 -0700 (PDT) From: Erikas Bitovtas Date: Thu, 16 Apr 2026 16:43:54 +0300 Subject: [PATCH RFC 07/10] clk: qcom: gcc-msm8939: mark Venus core GDSCs as hardware controlled Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260416-msm8939-venus-rfc-v1-7-a09fcf2c23df@gmail.com> References: <20260416-msm8939-venus-rfc-v1-0-a09fcf2c23df@gmail.com> In-Reply-To: <20260416-msm8939-venus-rfc-v1-0-a09fcf2c23df@gmail.com> To: Bryan O'Donoghue , Vikash Garodia , Dikshita Agarwal , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Andr=C3=A9_Apitzsch?= , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Erikas Bitovtas X-Mailer: b4 0.15.2 Since in downstream kernel VENUS_CORE0_GDSC and VENUS_CORE1_GDSC have a device tree property "qcom,supports-hw-trigger", add a HW_CTRL flag to these GDSCs to indicate that they are hardware controlled. Because they can be switched off at any moment, also skip voting for it so it can be enabled later. Signed-off-by: Erikas Bitovtas --- drivers/clk/qcom/gcc-msm8939.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/qcom/gcc-msm8939.c b/drivers/clk/qcom/gcc-msm8939.c index 45193b3d714b..420997b00ae0 100644 --- a/drivers/clk/qcom/gcc-msm8939.c +++ b/drivers/clk/qcom/gcc-msm8939.c @@ -3664,6 +3664,7 @@ static struct clk_branch gcc_venus0_vcodec0_clk = { static struct clk_branch gcc_venus0_core0_vcodec0_clk = { .halt_reg = 0x4c02c, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x4c02c, .enable_mask = BIT(0), @@ -3681,6 +3682,7 @@ static struct clk_branch gcc_venus0_core0_vcodec0_clk = { static struct clk_branch gcc_venus0_core1_vcodec0_clk = { .halt_reg = 0x4c034, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x4c034, .enable_mask = BIT(0), @@ -3753,6 +3755,7 @@ static struct gdsc venus_core0_gdsc = { .pd = { .name = "venus_core0", }, + .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, }; @@ -3761,6 +3764,7 @@ static struct gdsc venus_core1_gdsc = { .pd = { .name = "venus_core1", }, + .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, }; -- 2.53.0