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Thu, 23 Apr 2026 03:20:45 -0700 (PDT) Received: from hu-pkambar-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c7976f92183sm13944461a12.3.2026.04.23.03.20.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2026 03:20:44 -0700 (PDT) From: palash.kambar@oss.qualcomm.com To: mani@kernel.org, James.Bottomley@HansenPartnership.com, martin.petersen@oracle.com Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, bvanassche@acm.org, shawn.lin@rock-chips.com, nitin.rawat@oss.qualcomm.com, Palash Kambar Subject: [PATCH V7 2/2] ufs: ufs-qcom: Enable Auto Hibern8 clock request support Date: Thu, 23 Apr 2026 15:50:23 +0530 Message-Id: <20260423102023.3779489-3-palash.kambar@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260423102023.3779489-1-palash.kambar@oss.qualcomm.com> References: <20260423102023.3779489-1-palash.kambar@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=f4Z4wuyM c=1 sm=1 tr=0 ts=69e9f27e cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=gce-7N_bzMkFAa6Kq10A:9 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwMiBTYWx0ZWRfX3UTrc2NyN3U/ d2fsjFSxYkNYtvI/LaQ6VXuYvnxd/su7+roN2LgBXbiIxj5Ln/4S/5lSg3jC9VaZS7kFsIq1JBo hGLntfL5FPUrJwXDOJO7hH6J+F+sVwD9VLqd2ng9zH+D+Ga/dausXz7aPPW6lpFkk0PyjokM9tg MboVc/vI1Pq8oUYi2T30SNkQiO0zFuLkpWNDA9ckuUG+pTOaaOyM38czwH9xqqLuHXRvLZZEYqx 3sN0Ytg3Xo4sQpXVOyRMpNf15HuRW1GC9eS6jNUMDRufZeVDgoDlfPAUglMr1LR7mQ/LvYEd1QD oi5LWLGF7Xo9+yxqsv50KKzsMc0WmlVS1r62NeJae59ZhbIa4sFlixt0TgRsmUnzibj2MCa5XOq cmJERH4yHkELS6sZon3LEioDN3AwMp0MH/eRvZAP3uwzf7F72akctwmGm4IctL+vdhcqmTKVe8l DqKh+R6nsgqD9RTtoyw== X-Proofpoint-GUID: LbQicEzJLvcQntY00fumCarEBiXF-dvI X-Proofpoint-ORIG-GUID: LbQicEzJLvcQntY00fumCarEBiXF-dvI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 bulkscore=0 malwarescore=0 clxscore=1015 spamscore=0 suspectscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604230102 From: Palash Kambar On platforms that support Auto Hibern8 (AH8), the UFS controller can autonomously de-assert clk_req signals to the Global Clock Controller when entering the Hibern8 state. This allows Global Clock Controller (GCC) to gate unused clocks, improving power efficiency. Enable the Clock Request feature by setting the UFS_HW_CLK_CTRL_EN bit in the UFS_AH8_CFG register, as recommended in the Hardware Programming Guidelines. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Palash Kambar --- drivers/ufs/host/ufs-qcom.c | 10 ++++++++++ drivers/ufs/host/ufs-qcom.h | 11 +++++++++++ 2 files changed, 21 insertions(+) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 8ebee0cc5313..ed4c531e1fb2 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -683,6 +683,13 @@ static int ufs_qcom_cfg_timers(struct ufs_hba *hba, bool is_pre_scale_up, unsign return 0; } +static void ufs_qcom_link_startup_post_change(struct ufs_hba *hba) +{ + if (ufshcd_is_auto_hibern8_supported(hba)) + ufshcd_rmwl(hba, UFS_HW_CLK_CTRL_EN, UFS_HW_CLK_CTRL_EN, + UFS_AH8_CFG); +} + static int ufs_qcom_link_startup_notify(struct ufs_hba *hba, enum ufs_notify_change_status status) { @@ -708,6 +715,9 @@ static int ufs_qcom_link_startup_notify(struct ufs_hba *hba, */ err = ufshcd_disable_host_tx_lcc(hba); + break; + case POST_CHANGE: + ufs_qcom_link_startup_post_change(hba); break; default: break; diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 380d02333d38..f19def37c86f 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -228,6 +228,17 @@ enum { */ #define NUM_TX_R1W1 13 +/* bit definitions for UFS_AH8_CFG register */ +#define CC_UFS_SYS_CLK_REQ_EN BIT(2) +#define CC_UFS_ICE_CORE_CLK_REQ_EN BIT(3) +#define CC_UFS_UNIPRO_CORE_CLK_REQ_EN BIT(4) +#define CC_UFS_AUXCLK_REQ_EN BIT(5) + +#define UFS_HW_CLK_CTRL_EN (CC_UFS_SYS_CLK_REQ_EN |\ + CC_UFS_ICE_CORE_CLK_REQ_EN |\ + CC_UFS_UNIPRO_CORE_CLK_REQ_EN |\ + CC_UFS_AUXCLK_REQ_EN) + static inline void ufs_qcom_get_controller_revision(struct ufs_hba *hba, u8 *major, u16 *minor, u16 *step) -- 2.34.1