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Tue, 28 Apr 2026 21:22:54 -0700 (PDT) Received: from hu-vdadhani-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-834ed5a074dsm602200b3a.10.2026.04.28.21.22.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Apr 2026 21:22:54 -0700 (PDT) From: Viken Dadhaniya Subject: [PATCH v4 0/7] Add QSPI support for QCS615 and improve interconnect handling Date: Wed, 29 Apr 2026 09:52:39 +0530 Message-Id: <20260429-spi-nor-v4-0-73fb1bab03ba@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAI+H8WkC/3XOTQ6CMBAF4KuQri2Z/oCpK+9hXEAZpEYptkA0h Lvb4gISddPkJe9704l4dAY9OSQTcTgab2wbgtwlRDdFe0FqqpAJB56D4JL6ztDWOgpK55VCqBA yEtqdw9o8l6XT+ZP9UF5R95HHRmN8b91rOTWy2PteHRkFKrDGTGmmGVNH6336GIqbtvd7Gh4Sx 0e+csk2nAdeal3I8C9ZZvUfLjacw8pF4PsKBc8KroDBDz7P8xvnckvlNQEAAA== X-Change-ID: 20260324-spi-nor-09c6d9e0de05 To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Viken Dadhaniya , Krzysztof Kozlowski , Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; 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The series consists of: 1. Add QCS615 compatible string to device tree bindings. 2. Add qspi-memory interconnect path support to the driver for proper DMA bandwidth allocation. 3. Add QSPI support to QCS615 platform including OPP table, pinmux, and controller node. 4. Enable QSPI controller and SPI-NOR flash on QCS615-RIDE board. 5. Add QSPI memory interconnect paths to existing SC7180 and Kodiak platforms. The key improvement in this series is adding the qspi-memory interconnect path. Previously, the QSPI driver only managed the CPU-to-QSPI configuration path. Add support for the QSPI-to-memory path, which is essential for proper bandwidth allocation during DMA operations when the QSPI controller transfers data to/from system memory. Set the memory path bandwidth equal to the transfer speed, matching the existing pattern used for the CPU path. Enable and disable both paths properly during runtime PM transitions to ensure efficient power management. Apply this change to existing platforms (SC7180/Kodiak) as well as the newly added QCS615 platform to ensure consistent interconnect handling across all QSPI-enabled SoCs. Testing: - Verified QSPI functionality on QCS615-RIDE with SPI-NOR flash - Confirmed proper interconnect bandwidth voting during transfers - Validated runtime PM transitions with both interconnect paths Signed-off-by: Viken Dadhaniya --- Changes in v4: - Made qspi-memory node handling optional to gracefully fall back to legacy single-region behavior when the node is absent in older Device trees. - Checked return value of clk_bulk_prepare_enable() and logged error on failure in resume error path. - Fixed subject line style to match subsystem conventions - Link to v3: https://patch.msgid.link/20260420-spi-nor-v3-0-7de325a29010@oss.qualcomm.com Changes in v3: - Added missing interconnect-names constraint for qcom,qcs615-qspi. - Changed interconnect tags for qspi-memory path to QCOM_ICC_TAG_ALWAYS - Fixed suspend sequence: now disables clocks before dropping performance state to avoid brownout risk - Link to v2: https://patch.msgid.link/20260414-spi-nor-v2-0-bcca40de4b5f@oss.qualcomm.com Changes in v2: - Moved allOf section to bottom of binding schema - Added if:then constraint requiring minimum 2 interconnects for qcs615 - Fixed runtime PM error handling with complete goto-based cleanup - Added proper error paths in suspend/resume functions - Changed interconnect tags from raw 0 to QCOM_ICC_TAG_ACTIVE_ONLY - Link to v1: https://patch.msgid.link/20260324-spi-nor-v1-0-3efe59c1c119@oss.qualcomm.com --- Viken Dadhaniya (7): spi: dt-bindings: qcom,spi-qcom-qspi: Add qcom,qcs615-qspi compatible spi: spi-qcom-qspi: Fix incomplete error handling in runtime PM spi: spi-qcom-qspi: Add interconnect support for memory path arm64: dts: qcom: talos: Add QSPI support arm64: dts: qcom: qcs615-ride: Enable QSPI and NOR flash arm64: dts: qcom: kodiak: Add QSPI memory interconnect path arm64: dts: qcom: sc7180: Add QSPI memory interconnect path .../bindings/spi/qcom,spi-qcom-qspi.yaml | 21 +++++- arch/arm64/boot/dts/qcom/kodiak.dtsi | 9 ++- arch/arm64/boot/dts/qcom/qcs615-ride.dts | 12 ++++ arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++- arch/arm64/boot/dts/qcom/talos.dtsi | 80 ++++++++++++++++++++++ drivers/spi/spi-qcom-qspi.c | 80 +++++++++++++++++++--- 6 files changed, 192 insertions(+), 19 deletions(-) --- base-commit: c369299895a591d96745d6492d4888259b004a9e change-id: 20260324-spi-nor-09c6d9e0de05 Best regards, -- Viken Dadhaniya