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Wed, 29 Apr 2026 10:02:17 -0700 (PDT) Received: from hu-vdadhani-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b9887853a2sm29530195ad.18.2026.04.29.10.02.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2026 10:02:16 -0700 (PDT) From: Viken Dadhaniya Date: Wed, 29 Apr 2026 22:31:42 +0530 Subject: [PATCH v5 7/7] arm64: dts: qcom: sc7180: Add QSPI memory interconnect path Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260429-spi-nor-v5-7-993016c9711e@oss.qualcomm.com> References: <20260429-spi-nor-v5-0-993016c9711e@oss.qualcomm.com> In-Reply-To: <20260429-spi-nor-v5-0-993016c9711e@oss.qualcomm.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Viken Dadhaniya , Konrad Dybcio X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; 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Without this path, the interconnect framework cannot correctly vote for the bandwidth required by QSPI DMA data transfers. Reviewed-by: Konrad Dybcio Signed-off-by: Viken Dadhaniya --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index a4b17564469e..8341a7c4a4c6 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2866,9 +2866,12 @@ qspi: spi@88dc000 { clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <&gcc GCC_QSPI_CORE_CLK>; clock-names = "iface", "core"; - interconnects = <&gem_noc MASTER_APPSS_PROC 0 - &config_noc SLAVE_QSPI_0 0>; - interconnect-names = "qspi-config"; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_QSPI_0 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&aggre1_noc MASTER_QSPI QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "qspi-config", + "qspi-memory"; power-domains = <&rpmhpd SC7180_CX>; operating-points-v2 = <&qspi_opp_table>; status = "disabled"; -- 2.34.1