From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9EEAA3ED125 for ; Wed, 29 Apr 2026 10:36:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777458970; cv=none; b=kp1BBfTWNjsNYfV2pb+2FYz5sT/CIhfzsdnsMJ0bkwIClUEJx8X/GjjkWDwFdekKb5qpDwHypI2nKRCiB3UVxf7/GYF4eTn5rM8KFObaokwIDm7aExR4tHY33nUWu9Fk0SM8VdKZv2ExTP5N0eJ3JykrmERBRSErBpCAQ5JJ0Ng= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777458970; c=relaxed/simple; bh=pauRE4WXLd5A2mADI8u2GsacXvG9i2wtBaAlimcYA/M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Lus73NwLBUcYE2mEIDbOKsFn8bnmxO15Pu6hfw9jdTbMfmyb3mRw8hlksA4LFrsIdAPjsFMx1YWNq+ppeg7dU77bdkWCGElbL3vlN+cOWp3Jpz6vM9lPde76switvXL32eEBEuoZYoHm73zzhzZZFwN/eLr29WCs5TS8PBy7Vvs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=QD1pSY/M; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="QD1pSY/M" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AB0252A68; Wed, 29 Apr 2026 03:36:02 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 924233F763; Wed, 29 Apr 2026 03:36:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1777458968; bh=pauRE4WXLd5A2mADI8u2GsacXvG9i2wtBaAlimcYA/M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QD1pSY/MDkAcDHTkkN0t8lVDZP3T7fZVk+YI7zce5oH8/HyGdHsbibK3pWkGKWdLZ CGQylK2GGWM/ccaPPdsUrXXfu/zHALqaym2hnzxbaNNgQ8/biKefI7J7t4V1/9mWbX dv2KaoKRtjGQaKKKtj7JdOT+soTMRZAYvrhqG0Hc= From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, ardb@kernel.org, lpieralisi@kernel.org, mark.rutland@arm.com, steven.price@arm.com, aneesh.kumar@kernel.org, sudeep.holla@arm.com, robh@kernel.org, maz@kernel.org, Suzuki K Poulose Subject: [RFC PATCH 4/4] arm64: realm: Move RSI detection earlier Date: Wed, 29 Apr 2026 11:35:35 +0100 Message-ID: <20260429103535.266728-5-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260429103535.266728-1-suzuki.poulose@arm.com> References: <20260429103535.266728-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit As discussed in [0], Realm world detection happens too late for making the decision for the Linear map granularity for Arm64. If the boot CPU doesn't support BBML2_NOABORT, it is difficult to break the mapping to PTE level. To solve this try probing the Realm world earlier, now that we probe the PSCI/SMCCC earlier. Like the PSCI probe, if we fall back to the later point if the SMCCC probe wasn't successful. We should probably add a WARNING/panic the system if the BBML2_NOABORT is not supported on the boot CPU and linear map was created with block mappings. This may case avoided by using rodata=full. [0] https://lore.kernel.org/all/20260330161705.3349825-2-ryan.roberts@arm.com/ Signed-off-by: Suzuki K Poulose --- arch/arm64/include/asm/rsi.h | 1 + arch/arm64/kernel/rsi.c | 23 ++++++++++++++++++++++- arch/arm64/kernel/setup.c | 3 ++- 3 files changed, 25 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/rsi.h b/arch/arm64/include/asm/rsi.h index 88b50d660e85..4456bf0a1f23 100644 --- a/arch/arm64/include/asm/rsi.h +++ b/arch/arm64/include/asm/rsi.h @@ -14,6 +14,7 @@ DECLARE_STATIC_KEY_FALSE(rsi_present); +void __init arm64_early_rsi_init(void); void __init arm64_rsi_init(void); bool arm64_rsi_is_protected(phys_addr_t base, size_t size); diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c index c64a06f58c0b..2d2befae2c75 100644 --- a/arch/arm64/kernel/rsi.c +++ b/arch/arm64/kernel/rsi.c @@ -138,10 +138,14 @@ static int realm_ioremap_hook(phys_addr_t phys, size_t size, pgprot_t *prot) return 0; } -void __init arm64_rsi_init(void) +static bool rsi_probed = 0; + +static void __init rsi_probe(void) { if (arm_smccc_1_1_get_conduit() != SMCCC_CONDUIT_SMC) return; + + rsi_probed = true; if (!rsi_version_matches()) return; if (WARN_ON(rsi_get_realm_config(&config))) @@ -159,6 +163,23 @@ void __init arm64_rsi_init(void) static_branch_enable(&rsi_present); } +void __init arm64_early_rsi_init(void) +{ + rsi_probe(); +} + +void __init arm64_rsi_init(void) +{ + if (rsi_probed) + return; + + rsi_probe(); + /* + * TODO: Warn if we don't have BBML2_NOABORT and page mapping is + * not used. + */ +} + static struct platform_device rsi_dev = { .name = RSI_PDEV_NAME, .id = PLATFORM_DEVID_NONE diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 595aff6f17d5..0664130dd791 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -340,7 +340,8 @@ static void __init early_psci_init(void) return; } - psci_early_init_conduit(conduit); + if (!psci_early_init_conduit(conduit)) + arm64_early_rsi_init(); } void __init __no_sanitize_address setup_arch(char **cmdline_p) -- 2.43.0