From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41AF14ADDA4 for ; Tue, 5 May 2026 19:53:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778010811; cv=none; b=h0DVOazrGRaQNXUg0f6M/EBfeko6nmZqD0SCPMIz7g5iOhaiNngEl+ajGtw2vq1AmMN7OW/8vgrqzDTRtIa26vJnSE2UxIVftDeaYuaBjjpOYDX2lJrmbaVpRi514RzLBwizME9xe2BjoOxkMWYESwZXZi+wEMiBtPEzMb5yCHg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778010811; c=relaxed/simple; bh=goXS6LqFT86tybjMW2WTopAsBe3SyCMMxopPmd2bwEQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jHSZpIS/BKiB5tLhdabcrRTPFGtIcDVINW6XZ6OzXL0tRXjtcNLZvPVFa8AAJ4i+qPj7APkUXri68yxq5mHLet+9zS84//8xJSuBcXqpLr8S0mJ3pG7m0uezXTJHMOeQbAvTOExr+koRbUCQMirZ+PWgvGSEFNmb0BEeRZNBmnk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=dJZ+7duN; dkim=pass (2048-bit key) header.d=redhat.com header.i=@redhat.com header.b=ablJdjP2; arc=none smtp.client-ip=170.10.133.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="dJZ+7duN"; dkim=pass (2048-bit key) header.d=redhat.com header.i=@redhat.com header.b="ablJdjP2" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1778010809; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eDgVuOXO9SAgnm24T7PYI2oi9mr0H/9A0ybYZDCgDms=; b=dJZ+7duNa7RhZzNEj4QbounJaY7xUCBqyRe1spIacF6nufCuBy5/GSMy2WzXi+hQSq8qvf 4wj3dS86PfLt4ze84uZVQDSOn6Ui4BFWZqeS5IS9vmlK3LFyBIkQ3zBg5q3ZP4T31Pz3if zqKG8e0UoqviWDvddHMrn5L4262U16Y= Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-516-A0K8Mx8wMvyeoxS3ZLZNMA-1; Tue, 05 May 2026 15:53:28 -0400 X-MC-Unique: A0K8Mx8wMvyeoxS3ZLZNMA-1 X-Mimecast-MFC-AGG-ID: A0K8Mx8wMvyeoxS3ZLZNMA_1778010807 Received: by mail-wm1-f71.google.com with SMTP id 5b1f17b1804b1-48a55de6fb0so44801225e9.3 for ; Tue, 05 May 2026 12:53:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=google; t=1778010806; x=1778615606; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eDgVuOXO9SAgnm24T7PYI2oi9mr0H/9A0ybYZDCgDms=; b=ablJdjP2SpIPb5dQqsjuvvzZalkn/RlJcfrQ7qjedsggi7oHDJYnyDb/UsPMnsSzXq REZ3+pVGWQJLx/Y+i8iJZxhsxbYOLOesrMg6jv5xLUdvwFXtSRsoPScZdBcTuEZqHSwe 0WZZrho9rczxezX2Ks1IfjxQPL7/9E17s/aa2+Ivtqmm6LI6M9iYpWhpvjd/fAvi631X P30zjxXC6b+BNFSx9c8Cnpaaf/tBWHq+9NkCcXtCaQCmO3YXwjJdSwO8pUOkwksE6xea +H615ztU5OYc6IIC1FceZuW7Lg/QzPR/Di2WgYqSQaY0cPeUZkB6LPDtpEajJCdt2xt4 Cd8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778010806; x=1778615606; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=eDgVuOXO9SAgnm24T7PYI2oi9mr0H/9A0ybYZDCgDms=; b=F0cJQeWI0dHx7YucjGWrkK178hJlFbCKeTAYr2C/GT6faDq2MD/+cdzAfsn5PqHgPs gz2gw9lPN154//17OhQyYsCU+cFwdP8ZC8XHfOKpOMymnp0bGOoWh792Bn+P/q+7kZL3 NsbBlRg7QeXxrGt6ZgMxtmz6dayeFzUr3YZrPvUdy4U2BZJzi+x1eAH7wmQo2K84E3xn HzbU/cjgCMyOm7h6b74kiF9QjFfNazFRDj4dxGDudwsL55by7Oy7fVzMgY/+XN+A8K8Q 6H+pK4PFUZK6fzrq7kwFLzS58VXhjZ9oHgjH8RVvaMoVr3zoIFWWA7QZjtY72F/da3Aq tzjA== X-Gm-Message-State: AOJu0Yy0CWrCHEqQxRazzubgnVsSBdUSCR62Lu9T6+NF8nSzPlwT3I7Z MLDHb65xVUsBBNNDo3mEsRrjBGVMvOXFDOV17pLlyHnmU7tYgRkoucEx9p3NkJXkz+X7Tu+2vKL mSGRKf2J0V6tuLBW7yIE3lnMekoIL+sLflDr2QFQLkJ3afDx8BOnPikj6zPExSbgmoNrsxEgymH aYIUNnHXL/lCPvsfsL7TVlG7j32qTiY4MpOVBTosHnN8X8qrA1ag== X-Gm-Gg: AeBDietY0yUKlt68SoVHLgKkcoTT1XsP/fXiz0wR1LrkoxMI8Og1tldbapyDuZ9r91M ptFrxeJEtiDah8dvYBm8I1SFGIkXNq6O3v1M9hCHF3YG56tzxI4L4q63xyJi4tQTs7rdybKB5s7 Rl3zPkwWxnMMQjtauZussnaMkSF6CyBxHhOaNPsq/JVYwZcarse+IpU3zYLZuGnS2Qec9m+P3Qa iXSiQfbSCUq+sZ4HOR2Wm8lXTPFMjAR32QRAqBARuWxCLbASJw5jECNCkgff2bXFoE23K+YvNO4 UFtC/qRRhuvkMvYH206MkFqpdwb70cXA9pcpfcWurAFB8YHJH1R0jUtpvO6rQDV5Sx5qdMiRwMp ZWLncngnJalVJ2C8QNzyXcuH5iNi6CFJr2pzNlxZZjvq9NUHDcZ8/1Lw4bT0ZTokRKIXskgJecY I6efSccAIrBhPlsBhbZDext3u6miTH+hXrNai9ww8= X-Received: by 2002:a05:600c:8b06:b0:485:4388:3492 with SMTP id 5b1f17b1804b1-48e51e223ccmr10973305e9.11.1778010806071; Tue, 05 May 2026 12:53:26 -0700 (PDT) X-Received: by 2002:a05:600c:8b06:b0:485:4388:3492 with SMTP id 5b1f17b1804b1-48e51e223ccmr10973045e9.11.1778010805621; Tue, 05 May 2026 12:53:25 -0700 (PDT) Received: from [192.168.10.48] ([176.206.106.181]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48e5288fa13sm586955e9.14.2026.05.05.12.53.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2026 12:53:24 -0700 (PDT) From: Paolo Bonzini To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: d.riley@proxmox.com, jon@nutanix.com Subject: [PATCH 24/28] KVM: x86/mmu: hard code more bits in kvm_init_shadow_npt_mmu Date: Tue, 5 May 2026 21:52:22 +0200 Message-ID: <20260505195226.563317-25-pbonzini@redhat.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260505195226.563317-1-pbonzini@redhat.com> References: <20260505195226.563317-1-pbonzini@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The host CR0 does not really reflect onto the NPT format because hCR0.PG=1 must be set and hCR0.WP is ignored. Carve that in stone by removing the cr0 argument from kvm_init_shadow_npt_mmu. Pass in WP=1 as well; it does not matter for GMET disabled because PFERR_USER_MASK is always set, but a cleared W bit in the nested page tables cannot be overridden in supervisor mode when GMET is enabled, either. In fact, since CR0.WP=0 is the weird "extra accesses allowed" mode, it is acutally easier think about it being always set. Likewise, clear X86_CR4_SMAP to avoid that KVM erroneously faults on supervisor accesses to an U=1 page. Signed-off-by: Paolo Bonzini --- arch/x86/kvm/mmu.h | 4 ++-- arch/x86/kvm/mmu/mmu.c | 8 ++++---- arch/x86/kvm/svm/nested.c | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h index e1e3869f568b..1b354e1f2d81 100644 --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -96,8 +96,8 @@ void kvm_mmu_set_me_spte_mask(u64 me_value, u64 me_mask); void kvm_mmu_set_ept_masks(bool has_ad_bits); void kvm_init_mmu(struct kvm_vcpu *vcpu); -void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, - unsigned long cr4, u64 efer, gpa_t nested_cr3); +void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr4, + u64 efer, gpa_t nested_cr3); void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, int huge_page_level, bool accessed_dirty, bool mbec, gpa_t new_eptp); diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 912c8e97ef61..5a796ae8c396 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -5939,13 +5939,13 @@ static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, shadow_mmu_init_context(vcpu, context, cpu_role, root_role); } -void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0, - unsigned long cr4, u64 efer, gpa_t nested_cr3) +void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr4, + u64 efer, gpa_t nested_cr3) { struct kvm_mmu *context = &vcpu->arch.guest_mmu; struct kvm_mmu_role_regs regs = { - .cr0 = cr0, - .cr4 = cr4 & ~X86_CR4_PKE, + .cr0 = X86_CR0_PG | X86_CR0_WP, + .cr4 = cr4 & ~(X86_CR4_PKE | X86_CR4_SMAP), .efer = efer, }; union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s); diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c index df232153eb24..a1cffd274000 100644 --- a/arch/x86/kvm/svm/nested.c +++ b/arch/x86/kvm/svm/nested.c @@ -93,7 +93,7 @@ static void nested_svm_init_mmu_context(struct kvm_vcpu *vcpu) * when called via KVM_SET_NESTED_STATE, that state may _not_ match current * vCPU state. CR0.WP is explicitly ignored, while CR0.PG is required. */ - kvm_init_shadow_npt_mmu(vcpu, X86_CR0_PG, svm->vmcb01.ptr->save.cr4, + kvm_init_shadow_npt_mmu(vcpu, svm->vmcb01.ptr->save.cr4, svm->vmcb01.ptr->save.efer, svm->nested.ctl.nested_cr3); vcpu->arch.mmu->get_guest_pgd = nested_svm_get_tdp_cr3; -- 2.54.0