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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13202fbf0efsm2257796c88.13.2026.05.06.01.44.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 01:44:00 -0700 (PDT) From: Qiang Yu Subject: [PATCH v3 0/4] clk: qcom: Add common clkref support and migrate Glymur Date: Wed, 06 May 2026 01:43:50 -0700 Message-Id: <20260506-qref_vote_0506-v3-0-5ab71d2e6f16@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAEf/+mkC/yXMyw5AMBCF4VeRWWtS1+BVRERryli4tCUS8e4Gy y8n57/AoSV0UAUXWDzI0TIzkjAAPXbzgIJ6NsQyzmUmM7FZNO2xeGyZuTAqSpVRstB9CXxaeab zC9bNb7erCbV/K3DfD2xyfu1yAAAA X-Change-ID: 20260505-qref_vote_0506-fb14bfb08cd9 To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Qiang Yu , krishna.chundru@oss.qualcomm.com X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778057040; l=2713; i=qiang.yu@oss.qualcomm.com; s=20250513; h=from:subject:message-id; bh=9vA4fHyYmcRAvdU9Qy5L7g1YHobZkfL7qBI9EHl1cc0=; b=dNoxL7xzVuG/fA9F6C0/0aOb0eXGRFfaUaiM11KseP4Em/fKs/aBTK02gvsmSySFMLH1rgiSk nbHf1viqE4wBtvSMjZKcHpnyStaP9q4NAXW0NjrVk9p13jUhz+j8VN/ X-Developer-Key: i=qiang.yu@oss.qualcomm.com; a=ed25519; pk=Rr94t+fykoieF1ngg/bXxEfr5KoQxeXPtYxM8fBQTAI= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA2MDA4NCBTYWx0ZWRfXwKXoPus8XYrk jTZTNeSr+5rZsUfd8GZqDe1FjCn2s6zzHkiUl8eliYwtVqZdxLGceTz5qILzmzun4B4qHhP1XMF rfu3F2KqmyqzFMyEOnbbOTnXo7K5vCysrYsMKKdFv8jvBnS/h0/ZeL7gyk45NYA+xTOdoWS1+bv rEiQk6RIYCyCngvpetDM+cl69PkmSr6SbuGH+Qtrg7yayg+ogCUTviqFWRwld03jXvnJfj4RzE+ 5v/hXh1EN1xLG5PgOhEHjF4B1smR33Qy2h1TNSSJIsMZuMRbDfSSIXiNlbFqIuV0KbIjMkA6ibN ot94KPeSzB2tuarWRnECWJzemJahDNODxtMDy3/h9zM73GTDyB4oMdEtGBNfyOCf6XA6mpB31sm tGdxyMPl3BoF7CH9T/LWGJEj4bYykzDozYPWUBYNVIED8MLk3fxKY1+PRxEJO6C9hlFhpI2/T4d /jycmAjoN+xCViSut8Q== X-Proofpoint-GUID: 7w08Xzc1Qz9AlxYie1joMVyyg7V_UhRZ X-Proofpoint-ORIG-GUID: 7w08Xzc1Qz9AlxYie1joMVyyg7V_UhRZ X-Authority-Analysis: v=2.4 cv=MYhcfZ/f c=1 sm=1 tr=0 ts=69faff52 cx=c_pps a=kVLUcbK0zfr7ocalXnG1qA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=VwQbUJbxAAAA:8 a=zitRP-D0AAAA:8 a=EUspDBNiAAAA:8 a=gTLHQjeEnPAAWBE9dSMA:9 a=QEXdDO2ut3YA:10 a=vr4QvYf-bLy2KjpDp97w:22 a=xwnAI6pc5liRhupp6brZ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-05_03,2026-04-30_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 clxscore=1015 impostorscore=0 adultscore=0 spamscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605060084 This series adds a common clkref_en implementation and converts glymur to use it, along with the related binding and DTS updates. The PCIe clkref clocks on Glymur gate the QREF block which provides reference clocks to the PCIe PHYs. QREF requires LDO supplies and a reference voltage from the refgen block to operate. The refgen block itself requires vdda-refgen_0p9 and vdda-refgen_1p2 LDOs to function. Previously, these QREF votes were done in PHY drivers. In earlier discussion [1], the feedback was that this is the wrong ownership point: those supplies are for the QREF controlled by clkref registers, not for PHY directly. Based on that feedback, this series keeps the regulator handling with the clkref control path. Another reason for this series is reuse. clkref_en registers may live in different blocks across platforms (for example TCSR on Glymur, TLMM on SM8750 [2]), while the behavior is the same. The common helper lets each driver provide simple descriptors (name, offset, optional supplies) and reuse shared registration and runtime logic. [1] https://lore.kernel.org/lkml/aEBfV2M-ZqDF7aRz@hovoldconsulting.com/ [2] https://lore.kernel.org/linux-arm-msm/20260202-topic-8750_tcsr-v1-0-cd7e6648c64f@oss.qualcomm.com/ Changes in v3: - Fix dtb check error: allOf:0: 'then' is a dependency of 'if'. - Link to v2: https://lore.kernel.org/all/20260420-vote_qref_in_tcsrcc-v2-0-589a23ae640a@oss.qualcomm.com/ Changes in v2: - RFC tag dropped - Changed back to additionalProperties: false - Moved all Glymur supply properties into top-level properties so they are explicitly defined. - Link to v1: https://lore.kernel.org/all/20260331-qref_vote-v1-0-3fd7fbf87864@oss.qualcomm.com/ Signed-off-by: Qiang Yu --- Qiang Yu (4): dt-bindings: clock: qcom: Add QREF regulator supplies for glymur clk: qcom: Add generic clkref_en support clk: qcom: tcsrcc-glymur: Migrate tcsr_pcie_N_clkref_en to clk_ref common helper arm64: dts: qcom: glymur: Add QREF regulator supplies to TCSR .../bindings/clock/qcom,sm8550-tcsr.yaml | 57 ++++ arch/arm64/boot/dts/qcom/glymur-crd.dts | 19 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-ref.c | 202 ++++++++++++ drivers/clk/qcom/tcsrcc-glymur.c | 340 ++++++--------------- include/linux/clk/qcom.h | 69 +++++ 6 files changed, 441 insertions(+), 247 deletions(-) --- base-commit: 4cd074ae20bbcc293bbbce9163abe99d68ae6ae0 change-id: 20260505-qref_vote_0506-fb14bfb08cd9 Best regards, -- Qiang Yu