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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-839685a3187sm7566187b3a.60.2026.05.06.23.06.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 23:06:10 -0700 (PDT) From: Wangao Wang Date: Thu, 07 May 2026 14:05:47 +0800 Subject: [PATCH v6 4/5] arm64: dts: qcom: purwa: Override Iris clocks and operating points Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260507-enable_iris_on_purwa-v6-4-48da505e23bf@oss.qualcomm.com> References: <20260507-enable_iris_on_purwa-v6-0-48da505e23bf@oss.qualcomm.com> In-Reply-To: <20260507-enable_iris_on_purwa-v6-0-48da505e23bf@oss.qualcomm.com> To: Bryan O'Donoghue , Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Wangao Wang , Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778133946; l=2709; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=p/8Ia+hgACUnCJiEOKz2KDkUiywwxeTKUp58FnW6600=; b=ga4anJqCIUkaAV1pOfW7w/z8td+tCnbSaOuHupy+vkEM9yQf7+3ZcnsChAJVSbin594v6UdaY Y0C0PW2xyiXBp7xscpwcKIamc40KT4600N7vLvAd7iytQt892mgASqb X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-ORIG-GUID: hr9PgkTZZjMeGCpcd_A7tdjN7zQH6Ar1 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA3MDA1NyBTYWx0ZWRfX46+0TBlhhEMU lGK71dgUC0jpmA7WHMwpTn6TrFBh+JfeAJgoDGkDsMpMOBB6q6lWGAQX4IJ0s3YpkM9r8KRxU1w d/T0bEDZKcHcAHhw+y3Rl/WG44YeRo5vnCcfB8WBHSs628ZATylfze+s7eV7SLoMwLx+VTY/PrF NmFTC5uXviwjW/riGYu9mNzoZ48lG6L1XrMhIf+iXMHpXbzUiKd7pDZ+nzojvgpH6QGb1UncLlw 9bGGphy/U7djxwgQnp9eOhLOTdwddZu87eaASZQZeQOMBPl42UFd/CFfcr766WwadMotsNNAZ5C MOVbdw/9mqUAkTs6BtfA7K4zKI0hD6lLTS4RtK8ESTfVxWIllU3mXijE5l+YeKhqpKGxvDLKha6 8HLXaEyeT2GfPdUcQrQ0+5ITsy84Ttr1gmxc/pqqHGS6Z57GHkWEC5QDSJUXTQAbVE8v7Ch8XGe IiQJ5AGx140JwIlKk1g== X-Proofpoint-GUID: hr9PgkTZZjMeGCpcd_A7tdjN7zQH6Ar1 X-Authority-Analysis: v=2.4 cv=X8Zi7mTe c=1 sm=1 tr=0 ts=69fc2bd4 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=4TMTxM8xbnWuMOlFmbIA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-06_02,2026-05-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 spamscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 priorityscore=1501 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605070057 The Iris block on X1P differs from SM8550/X1E in its clock configuration and requires a dedicated OPP table. The node inherited from the X1E cannot be reused directly, and the fallback compatible "qcom,sm8550-iris" cannot be applied. Override the inherited clocks, clock-names, and operating points, and replaces them with the X1P42100-specific definitions. A new OPP table is provided to support the correct performance levels on this platform. Reviewed-by: Konrad Dybcio Reviewed-by: Dikshita Agarwal Reviewed-by: Dmitry Baryshkov Signed-off-by: Wangao Wang --- arch/arm64/boot/dts/qcom/purwa.dtsi | 50 +++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/purwa.dtsi b/arch/arm64/boot/dts/qcom/purwa.dtsi index ea65b8448836ead83f837e973ed536e8ea0ed8ef..a503deec97d75dcfb6792b007e0b74e517404cfc 100644 --- a/arch/arm64/boot/dts/qcom/purwa.dtsi +++ b/arch/arm64/boot/dts/qcom/purwa.dtsi @@ -21,6 +21,7 @@ /delete-node/ &cpu_pd11; /delete-node/ &gpu_opp_table; /delete-node/ &gpu_speed_bin; +/delete-node/ &iris_opp_table; /delete-node/ &pcie3_phy; /delete-node/ &thermal_aoss3; /delete-node/ &thermal_cpu2_0_btm; @@ -167,6 +168,55 @@ &gpucc { compatible = "qcom,x1p42100-gpucc"; }; +&iris { + compatible = "qcom,x1p42100-iris"; + + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_BSE_CLK>; + clock-names = "iface", + "core", + "vcodec0_core", + "vcodec0_bse"; + + operating-points-v2 = <&iris_opp_table_x1p42100>; + + iris_opp_table_x1p42100: opp-table { + compatible = "operating-points-v2"; + + opp-210000000 { + opp-hz = /bits/ 64 <210000000 105000000>; + required-opps = <&rpmhpd_opp_low_svs_d1>, + <&rpmhpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000 150000000>; + required-opps = <&rpmhpd_opp_low_svs_d1>, + <&rpmhpd_opp_svs>; + }; + + opp-335000000 { + opp-hz = /bits/ 64 <335000000 167500000>; + required-opps = <&rpmhpd_opp_svs>, + <&rpmhpd_opp_svs_l1>; + }; + + opp-424000000 { + opp-hz = /bits/ 64 <424000000 212000000>; + required-opps = <&rpmhpd_opp_svs>, + <&rpmhpd_opp_nom>; + }; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000 250000000>; + required-opps = <&rpmhpd_opp_svs>, + <&rpmhpd_opp_turbo>; + }; + }; +}; + /* PCIe3 has half the lanes compared to X1E80100 */ &pcie3 { num-lanes = <4>; -- 2.43.0