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Fri, 08 May 2026 06:12:04 -0700 (PDT) Received: from arch.localdomain ([2409:8a28:a53:11::1002]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2f91004b6a2sm683666eec.0.2026.05.08.06.11.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 06:12:03 -0700 (PDT) From: Jun Yan To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-leds@vger.kernel.org Cc: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, luccafachinetti@gmail.com, pzalewski@thegoodpenguin.co.uk, daniel@zonque.org, Jun Yan Subject: [PATCH v5 3/5] dt-bindings: leds: leds-is31fl32xx: Add powerdown-gpios property Date: Fri, 8 May 2026 21:11:37 +0800 Message-ID: <20260508131139.1523597-4-jerrysteve1101@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260508131139.1523597-1-jerrysteve1101@gmail.com> References: <20260508131139.1523597-1-jerrysteve1101@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The IS31FL32XX series features an SDB shutdown pin. Driving it low (active low) places the chip into hardware shutdown mode for power saving, while all register contents are preserved and registers are not reset. Add powerdown-gpios property to describe the GPIO connected to the SDB pin of IS31FL32XX series LED controllers. Signed-off-by: Jun Yan Reviewed-by: Rob Herring (Arm) --- .../devicetree/bindings/leds/issl,is31fl32xx.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/leds/issl,is31fl32xx.yaml b/Documentation/devicetree/bindings/leds/issl,is31fl32xx.yaml index a8ed62fd2f35..1763d3a17168 100644 --- a/Documentation/devicetree/bindings/leds/issl,is31fl32xx.yaml +++ b/Documentation/devicetree/bindings/leds/issl,is31fl32xx.yaml @@ -45,6 +45,15 @@ properties: When present, the chip's PWM will operate at ~22kHz as opposed to ~3kHz to move the operating frequency out of the audible range. + powerdown-gpios: + maxItems: 1 + description: + GPIO connected to the chip's SDB pin. + Driving this GPIO low places the chip into hardware shutdown mode + for power saving. All register contents are preserved and registers + are not reset during shutdown. The chip exits hardware shutdown mode + when the SDB pin is pulled high. + "#address-cells": const: 1 @@ -145,6 +154,7 @@ additionalProperties: false examples: - | + #include #include i2c { @@ -157,6 +167,8 @@ examples: #address-cells = <1>; #size-cells = <0>; + powerdown-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + led@1 { reg = <1>; color = ; -- 2.53.0