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Fri, 08 May 2026 14:23:44 -0700 (PDT) X-Received: by 2002:a05:7300:bc0c:b0:2c5:ed1b:ca9 with SMTP id 5a478bee46e88-2f85bb72d01mr2298224eec.1.1778275424067; Fri, 08 May 2026 14:23:44 -0700 (PDT) Received: from localhost ([140.82.166.162]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2f88847506fsm4512457eec.18.2026.05.08.14.23.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:23:43 -0700 (PDT) From: Andrew Jones To: linux-riscv@lists.infradead.org, iommu@lists.linux.dev Cc: linux-kernel@vger.kernel.org, tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org, pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org, Nutty Liu Subject: [PATCH 2/2] iommu/dma: enable IOMMU_DMA for RISC-V Date: Fri, 8 May 2026 16:23:39 -0500 Message-ID: <20260508212339.381933-3-andrew.jones@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260508212339.381933-1-andrew.jones@oss.qualcomm.com> References: <20260508212339.381933-1-andrew.jones@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA4MDIxMSBTYWx0ZWRfX+ISxcpRSysCP y/EIODWEuPlLMjzuOaTSBFtwTy704YceNb1AiCGB5fWbQTJp+wYq48I5onwhNeK+6aT98J2Myv+ GCArfF3Z2NiD5aZbnsMxdeeDYLcZtJjpgtDFSfpS4k47GT3k4Kkmt+vvuYssrh6IQmggKfLaMrY fqlchwq93HoXTY3THubqhtMlJcS3d9OH0ls/J25HuDd34BNyAIBRMyXBt9p0zJrl7LERsBCwtWq zJ7SGj8y52uNbNE6hCAkOx/8v1QA/5wfczmqQULmrXOjKUnAw3rX6gzOKVTy9iPEB4rC2EWJCi1 dlAY8S3l1/5/pbdrFjR4Sv3NCVJGmEZ53Rl+qHneKF/iVXRpYErBKgrrO6BR2wDFCCXZfDRW6rB gauMrcum99VYtEfRjBJdA1kRGVxtfECx+kmFh8BGeTd8Mh83oOQQa0mt+etg8E3Oyim7kAGuQ1o XQ7d4nbMM9Q+sPe6PRw== X-Authority-Analysis: v=2.4 cv=RZOgzVtv c=1 sm=1 tr=0 ts=69fe5461 cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=cvcws7F5//HeuvjG1O1erQ==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=h0uksLzaAAAA:8 a=EUspDBNiAAAA:8 a=69EAbJreAAAA:8 a=hQ6NVdKzidvgU2_XqusA:9 a=6Ab_bkdmUrQuMsNx7PHu:22 a=MSi_79tMYmZZG2gvAgS0:22 X-Proofpoint-GUID: 1jQGwQgzCtfXqZUa08a12KyygXG2UI3s X-Proofpoint-ORIG-GUID: 1jQGwQgzCtfXqZUa08a12KyygXG2UI3s X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-07_02,2026-05-08_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 suspectscore=0 impostorscore=0 malwarescore=0 adultscore=0 phishscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605080211 From: Tomasz Jeznach With iommu/riscv driver available we can enable IOMMU_DMA support for RISC-V architecture. Signed-off-by: Tomasz Jeznach Signed-off-by: Andrew Jones Reviewed-by: Nutty Liu --- drivers/iommu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index f86262b11416..34d8a792339f 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -151,7 +151,7 @@ config OF_IOMMU # IOMMU-agnostic DMA-mapping layer config IOMMU_DMA - def_bool ARM64 || X86 || S390 + def_bool ARM64 || X86 || S390 || RISCV select DMA_OPS_HELPERS select IOMMU_API select IOMMU_IOVA -- 2.43.0