From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Borislav Petkov <bp@alien8.de>, Thomas Gleixner <tglx@kernel.org>,
Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
xiaoyao.li@intel.com
Subject: [PATCH] x86/microcode: Fix comment in microcode_loader_disabled()
Date: Tue, 12 May 2026 23:27:54 +0800 [thread overview]
Message-ID: <20260512152754.671760-1-xiaoyao.li@intel.com> (raw)
The code in microcode_loader_disabled() actually checks for the bit 31
in CPUID[1]:ECX being set. Update the comment to match the code.
No functional change intended.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
arch/x86/kernel/cpu/microcode/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 651202e6fefb..68a1a893246c 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -126,7 +126,7 @@ bool __init microcode_loader_disabled(void)
}
/*
- * 2) Bit 31 in CPUID[1]:ECX is clear
+ * 2) Bit 31 in CPUID[1]:ECX is set
* The bit is reserved for hypervisor use. This is still not
* completely accurate as XEN PV guests don't see that CPUID bit
* set, but that's good enough as they don't land on the BSP
base-commit: 5d6919055dec134de3c40167a490f33c74c12581
--
2.43.0
next reply other threads:[~2026-05-12 15:40 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 15:27 Xiaoyao Li [this message]
2026-05-12 16:39 ` [tip: x86/microcode] " tip-bot2 for Xiaoyao Li
2026-05-12 23:23 ` [PATCH] " Andrew Cooper
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