From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC3573033D8 for ; Wed, 13 May 2026 17:50:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.41 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778694619; cv=none; b=liVqelvDk0PnpRXGHoyfasZVmv5MVSUGLi/2nmcMEm4gG0zDpppxK/LfRR2XbyQiim9UrmkKWRsTh0U72E1qBJpvqb2ozloVWNIy1ZHq+eacQTk1nYNPXdoD5c1hYgIbzcVzhcXJfNGHhbAJG3g0mZYOxvpE6bp7vNk1dnjF3mc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778694619; c=relaxed/simple; bh=I7AK8mQuOirUiip7K/NeOjliBDfMrmZxkw9YfShvu0s=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=ZeR+S45wDFnL0civZMKWlGF8FrfWKvVuhlNgDbTVE3VcdMytyAEOakDT2sLqgl1+cPmi8k5wzPgcCQkmAj90/zEV5hksQZRlFaojmqVJLCwGO+yeAI3DRjU+ISd2hL06cfJS4/wIw4qt+1sdc+SAXBz0EEgqaoxdB3LogSv0Dok= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=fqjfV9Z/; arc=none smtp.client-ip=209.85.221.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fqjfV9Z/" Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-44b7e8b65faso658229f8f.1 for ; Wed, 13 May 2026 10:50:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778694616; x=1779299416; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=qH/V54VhhqPOZledFsLbM+R0VpSJHUS2eyEFY9ZqlwU=; b=fqjfV9Z/7AzI/yooRDY87ztSRX+2R7fOZIb0Rv3/4D6A3GwrjSwn06hvyjR6U+wfMw woJPMMoF4Wcl4E8BIEqNgtsS50V4DfSXXVwXu9sFKdvel+gCvVPms3hTxzBq7Cw57ZHY WCblN+3u2RMAeyLIv2Q4TO3O5QgnauqZtPMhtaQ9oJYmDhOs27f8unAGVoDqy6cF1aCD CqSRUWESP7RMujD6iRXfoTyN+iYAtTZwBHHdYqmsHpGJU6F5BB2e1XbOV6+0SsbH5nTX fcfvLyVMuf7Lgoy5vlQ516HsIfW8EQIoBz8AnQUIsSqSp4WEYjfQukdqOHU8N/sScIeg XZ+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778694616; x=1779299416; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=qH/V54VhhqPOZledFsLbM+R0VpSJHUS2eyEFY9ZqlwU=; b=D7ybxQAGvTsC0sQu6HWqpFiIJrYGKl4YDrAcqlVcaOIiK7qsH3wGnd/F+bZDsSCgnN 2OoulVpyWP2I6McCA/8E3WMQclwE6G4gssfa7eFqQVMsa40GvDHy97P8+VNcqg33vfpK iGf1pbhtIpxk6v0FTFLDRTaFxlN0RNJkRUb5s3fVUmy4qM/AcJC4wXfobmnQptgOkRtM t3meLKd4h/XHzYULsYZtsS5RzXPq5m0AfKLVRC0biu0P1C4c0rFWx6/iAPcYy5n99yIK lXfEElfStSkEwnedH0F2I9Gpve2I9p2IESVLcwhPyAE9I3ykIKtFJRSGtLYqODHUeD/L 08Nw== X-Forwarded-Encrypted: i=1; AFNElJ8xmTV9MpIuIcrqhLm3PxfFXMj7RyqiLFmY6G4y2L6j4ZZUq7wlC1SUORnPmvr0A3s+aBGlXVCt8Dxw9hw=@vger.kernel.org X-Gm-Message-State: AOJu0YwHlg4tlcidZTnYNP1FCufvpNneD8jV69ZkVsLw0BdVIWkmcy1j R14YdgjKk8zajynWb0nnQrFaafx4NNBEoh+/BSm4i21x4thatINKFgWJ X-Gm-Gg: Acq92OFKs9oVhaj5cOilW3g6ZZkfWE+OngN3Tnkrc+lbAKR9V77WYhX7BH8PM9Um56U RFpzw7ELga497EaOa6070rVA4v37wbLWBKCq/r8zKShwsy2yAvFO5UdaQ9ZF9+z3nBRpn//KAaM FN/y82Wh6CTSmh2xsFJ1apppTTtE0Vr0dMZRltAddy/SJuB6eqH5y2MS8xS0SotmsV1rvnRfjja pKegOHu4FCKJSEW8Qe8CU0CwCWu1aNgslinWCxjhM/cqRnEDygur1caJh5jwpI2Q4GlUQZnSLVX pMUOgW/kXu6OlbAPlihDp2gmsdhEmFO1vHPTVkiGEGCstsJTwoZJ/UJNF97wXXlHSuEHLCPOe9h mRekUF4bK7EB3e00QeKeK5aUoA9NmiW3o1/S96Gcdu23r/xS3VwE8J3INC41k5uv6WIbIjqqVQP 8dk8FerZvPSG9BhgCyoe3YEi+5W4DxZOGTkBBFvHMYAPRvQ7+7zNK2NJ0iVHOKkskSBRdAT5Sby Trpcxba1lL9OS0hFHpMYwkvQQ== X-Received: by 2002:a05:6000:29d1:b0:456:3af2:852e with SMTP id ffacd0b85a97d-45c58b6782cmr2147922f8f.1.1778694616038; Wed, 13 May 2026 10:50:16 -0700 (PDT) Received: from Neo.taile6b6ba.ts.net (ip-109-193-028-214.um39.pools.vodafone-ip.de. [109.193.28.214]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0fe13a7sm486730f8f.29.2026.05.13.10.50.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 May 2026 10:50:15 -0700 (PDT) From: Marek Czernohous X-Google-Original-From: Marek Czernohous To: nouveau@lists.freedesktop.org Cc: Lyude Paul , Danilo Krummrich , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Marek Czernohous Subject: [PATCH 0/2] drm/nouveau: nv04 FIFO cleanup + recovery for Tesla Date: Wed, 13 May 2026 19:50:11 +0200 Message-ID: <20260513175014.96599-1-marek@czernohous.de> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi all, Two-patch series for the legacy nv04_fifo path covering Tesla (MCP77/MCP79 and G80-GT218). Daily-driven on the reference NVAC hardware (Apple Mac mini Late 2009, GeForce 9400M) since 2026-05-05. Patch 1 demotes a benign CACHE_ERROR that fires once per Mesa session start on Tesla GPUs. The Mesa NV50 userspace driver issues a method- 0x0060 / data-0xbeef02xx binding probe that recovers cleanly via nv04_fifo_swmthd(), but currently logs at error level on every X or Wayland session, dominating dmesg noise on this hardware class. This clears the channel for patch 2 to identify real faults from noise. Patch 2 adds a two-tier fault-recovery path for Tesla FIFO faults: Tier 1 (per fault). Look up the channel via nvkm_chan_get_chid, call nvkm_chan_error(chan, true), fire tracepoint nouveau:fifo_chan_killed. Idempotent through the existing chan->errored short-circuit. Tier 2 (sliding window). When the per-fifo fault count in a configurable window reaches the threshold, schedule a worker that calls drm_dev_wedged_event(drm, DRM_WEDGE_RECOVERY_REBIND, NULL) and fires tracepoint nouveau:fifo_dev_wedged. Worker context is needed because kobject_uevent_env may sleep. Motivation: Fermi+ gets channel-kill and device-wedge automatically through nvkm_runl_rc; Tesla was feature-frozen before the DRM wedge uAPI existed. Three observable consequences on the reference hardware: 1. Silent state corruption (channel produces wrong output after a fault, no notice to userspace). 2. Observability gap (no counters, tracepoints, or wedge event, only dmesg). 3. Repeated-fault loop (the log-and-reset cycle repeats forever on a persistently faulting channel instead of killing it). Validation. A debugfs fault-injector (kept on a separate DO-NOT-MERGE branch, not part of this submission) was used to drive both Tier-1 and Tier-2 paths through their full state space. Phases 1-5 of the test plan were exercised that way. Phase 6 (no manual injection, real workload soak) ran 2026-05-05 through 2026-05-13: one organic DRM_WEDGE_RECOVERY_REBIND event was captured on 2026-05-05 09:08; the rest of the soak was fault-free. Companion userland tool nouveau-pstate-daemon v0.2.0 [1] subscribes to the WEDGED=rebind uevent in log-only mode and was used to confirm end-to-end propagation through udev. Module parameters: nouveau.fifo_wedge_count (uint, 0..32, default 10) nouveau.fifo_wedge_window_ms (uint, 100..600000, default 60000) Setting fifo_wedge_count=0 disables Tier-2 entirely while keeping Tier-1 channel-kill active. A note on MAINTAINERS. The series adds a new file drivers/gpu/drm/nouveau/nvkm/engine/fifo/recover.c. The change is covered by the existing nouveau MAINTAINERS section (drivers/gpu/drm/nouveau/), so no MAINTAINERS update is included. checkpatch.pl flags this as a hint; it is not load-bearing. This is a follow-up to the April 9 NVAC stability series [2], which is still awaiting review. The two patches here are independent of that series and apply against current Linus master. [1] https://github.com/hibbes/nouveau-pstate-daemon (v0.2.0) [2] https://lore.kernel.org/dri-devel/20260409-nouveau-nvac-stability-series Marek Czernohous (2): drm/nouveau/fifo/nv04: filter benign CACHE_ERROR from Mesa NV50 bind probe drm/nouveau/fifo: add recovery path for Tesla cache_error/dma_pusher .../drm/nouveau/include/nvkm/engine/fifo.h | 12 ++ .../include/trace/events/nouveau_fifo.h | 58 +++++++++ drivers/gpu/drm/nouveau/nouveau_drm.c | 29 +++++ .../gpu/drm/nouveau/nvkm/engine/fifo/Kbuild | 1 + .../gpu/drm/nouveau/nvkm/engine/fifo/base.c | 3 + .../gpu/drm/nouveau/nvkm/engine/fifo/nv04.c | 29 ++++- .../gpu/drm/nouveau/nvkm/engine/fifo/priv.h | 10 ++ .../drm/nouveau/nvkm/engine/fifo/recover.c | 121 ++++++++++++++++++ 8 files changed, 257 insertions(+), 6 deletions(-) create mode 100644 drivers/gpu/drm/nouveau/include/trace/events/nouveau_fifo.h create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/fifo/recover.c base-commit: 1f63dd8ca0dc05a8272bb8155f643c691d29bb11 -- 2.53.0