From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 364FE33D503; Sat, 16 May 2026 18:30:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778956257; cv=none; b=CKhoeQ7Q8Fmc8/3sdPqobaH2hGPuySfB1GBv+dz5mGUiCydHoPECbsZfvgmsmOMZDRU76w4GV/e0kOPkd/Nl31FzBSBNnWej4D25vdnfMzzJMxGwf9ONK0Zuw6ucWhYnGiIajXoYM2lcf0+4fTZwaMggrWhwMDfVJQYudF96uMs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778956257; c=relaxed/simple; bh=oes1Zq1kjZJVeEfVMd7tTaCf/godZJPRNpOF8x60M7Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y2x79sTENu55FACEcu4jOGeOn9KXeZqZ52Yt+8mTuQu9v8284oAX7nHVqsq+mLiA9lsfZHJg88JgYCTCnACMOK9LrbXHoS8FkncRtFjVNnz66iYaIRmfsaR1lL6gYiJ0RhEM4mdZ6ycI04EQMPApysXHu/UxNkqi+uFDGF0FKyc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=ZzMsjZUe; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="ZzMsjZUe" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 76D272D91; Sat, 16 May 2026 11:30:49 -0700 (PDT) Received: from workstation-e142269.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 09DDD3F85F; Sat, 16 May 2026 11:30:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778956254; bh=oes1Zq1kjZJVeEfVMd7tTaCf/godZJPRNpOF8x60M7Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZzMsjZUeF9Y1iEIsRLrVrIagU7XwyK43VIstkh2KG+3ABw923pUruQwifyGeFF/t6 TPz2TgwwMQhlZarcQX1ZPQKx06U0z2DfxbsU3zRlN0JuKCgLv3puU0HV5t/SrG3N1S B7xc0tXkNsiRhhppG7HQHZMxVCOEByclbF2+kUZc= From: Wei-Lin Chang To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Cc: Paolo Bonzini , Shuah Khan , Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Itaru Kitayama , Wei-Lin Chang Subject: [PATCH v3 2/9] KVM: arm64: selftests: Add helpers for guest hypervisors Date: Sat, 16 May 2026 19:29:56 +0100 Message-ID: <20260516183003.799058-3-weilin.chang@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260516183003.799058-1-weilin.chang@arm.com> References: <20260516183003.799058-1-weilin.chang@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add helpers so that guest hypervisors can run nested guests. SP_EL1 save/restore is added to allow nested guests to use a stack. Signed-off-by: Wei-Lin Chang --- .../selftests/kvm/include/arm64/nested.h | 17 +++++++ tools/testing/selftests/kvm/lib/arm64/entry.S | 5 ++ .../testing/selftests/kvm/lib/arm64/nested.c | 46 +++++++++++++++++++ 3 files changed, 68 insertions(+) diff --git a/tools/testing/selftests/kvm/include/arm64/nested.h b/tools/testing/selftests/kvm/include/arm64/nested.h index 86d931facacb..30e626e427da 100644 --- a/tools/testing/selftests/kvm/include/arm64/nested.h +++ b/tools/testing/selftests/kvm/include/arm64/nested.h @@ -21,8 +21,17 @@ extern char hyp_vectors[]; +enum vcpu_sysreg { + __INVALID_SYSREG__, /* 0 is reserved as an invalid value */ + + SP_EL1, + + NR_SYS_REGS +}; + struct cpu_context { struct user_pt_regs regs; /* sp = sp_el0 */ + u64 sys_regs[NR_SYS_REGS]; }; struct vcpu { @@ -37,9 +46,17 @@ struct hyp_data { struct cpu_context hyp_context; }; +void prepare_hyp(void); +void init_vcpu(struct vcpu *vcpu, gpa_t l2_pc, gpa_t l2_stack_top); +int run_l2(struct vcpu *vcpu, struct hyp_data *hyp_data); + +void do_hvc(void); u64 __guest_enter(struct vcpu *vcpu, struct cpu_context *hyp_context); void __hyp_exception(u64 type); +void __sysreg_save_el1_state(struct cpu_context *ctxt); +void __sysreg_restore_el1_state(struct cpu_context *ctxt); + #endif /* !__ASSEMBLER__ */ #endif /* SELFTEST_KVM_NESTED_H */ diff --git a/tools/testing/selftests/kvm/lib/arm64/entry.S b/tools/testing/selftests/kvm/lib/arm64/entry.S index 33bedf5e7fb2..df3af3463c6c 100644 --- a/tools/testing/selftests/kvm/lib/arm64/entry.S +++ b/tools/testing/selftests/kvm/lib/arm64/entry.S @@ -3,6 +3,11 @@ * adapted from arch/arm64/kvm/hyp/entry.S */ + .globl do_hvc + do_hvc: + hvc #0 + ret + /* * Manually define these for now */ diff --git a/tools/testing/selftests/kvm/lib/arm64/nested.c b/tools/testing/selftests/kvm/lib/arm64/nested.c index 06ddaab2436f..f6c24beb01d0 100644 --- a/tools/testing/selftests/kvm/lib/arm64/nested.c +++ b/tools/testing/selftests/kvm/lib/arm64/nested.c @@ -4,7 +4,53 @@ */ #include "nested.h" +#include "processor.h" #include "test_util.h" +#include + +void prepare_hyp(void) +{ + write_sysreg(HCR_EL2_E2H | HCR_EL2_RW, hcr_el2); + write_sysreg(hyp_vectors, vbar_el2); + isb(); +} + +void init_vcpu(struct vcpu *vcpu, gpa_t l2_pc, gpa_t l2_stack_top) +{ + memset(vcpu, 0, sizeof(*vcpu)); + vcpu->context.regs.pc = l2_pc; + vcpu->context.regs.pstate = PSR_MODE_EL1h | PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT; + vcpu->context.sys_regs[SP_EL1] = l2_stack_top; +} + +void __sysreg_save_el1_state(struct cpu_context *ctxt) +{ + ctxt->sys_regs[SP_EL1] = read_sysreg(sp_el1); +} + +void __sysreg_restore_el1_state(struct cpu_context *ctxt) +{ + write_sysreg(ctxt->sys_regs[SP_EL1], sp_el1); +} + +int run_l2(struct vcpu *vcpu, struct hyp_data *hyp_data) +{ + u64 ret; + + __sysreg_restore_el1_state(&vcpu->context); + + write_sysreg(vcpu->context.regs.pstate, spsr_el2); + write_sysreg(vcpu->context.regs.pc, elr_el2); + + ret = __guest_enter(vcpu, &hyp_data->hyp_context); + + vcpu->context.regs.pc = read_sysreg(elr_el2); + vcpu->context.regs.pstate = read_sysreg(spsr_el2); + + __sysreg_save_el1_state(&vcpu->context); + + return ret; +} void __hyp_exception(u64 type) { -- 2.43.0