From: Conor Dooley <conor@kernel.org>
To: Caleb James DeLisle <cjd@cjdns.fr>
Cc: linux-mips@vger.kernel.org, conor+dt@kernel.org,
daniel.lezcano@kernel.org, devicetree@vger.kernel.org,
krzk+dt@kernel.org, linux-kernel@vger.kernel.org,
naseefkm@gmail.com, robh@kernel.org, tglx@kernel.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v4 1/4] dt-bindings: timer: econet: Update EN751627 for multi-IRQ
Date: Sun, 17 May 2026 00:12:04 +0100 [thread overview]
Message-ID: <20260517-cathouse-spiral-6a56c30ec223@spud> (raw)
In-Reply-To: <20260516215720.4160831-2-cjd@cjdns.fr>
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On Sat, May 16, 2026 at 09:57:17PM +0000, Caleb James DeLisle wrote:
> This hardware is found in the EN751221 SoC family as well as the
> EN751627. The former uses a percpu IRQ for all timers while the
> latter uses an individual IRQ number per timer.
>
> Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../bindings/timer/econet,en751221-timer.yaml | 23 ++++++++++++++-----
> 1 file changed, 17 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
> index c1e7c2b6afde..16f32741473f 100644
> --- a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
> +++ b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
> @@ -12,8 +12,9 @@ maintainers:
> description:
> The EcoNet High Precision Timer (HPT) is a timer peripheral found in various
> EcoNet SoCs, including the EN751221 and EN751627 families. It provides per-VPE
> - count/compare registers and a per-CPU control register, with a single interrupt
> - line using a percpu-devid interrupt mechanism.
> + count/compare registers and a per-CPU control register. On EN751221 it uses a
> + single interrupt line using a percpu-devid interrupt mechanism, and on
> + EN751627 it uses an interrupt per VPE.
>
> properties:
> compatible:
> @@ -28,8 +29,8 @@ properties:
> maxItems: 2
>
> interrupts:
> - maxItems: 1
> - description: A percpu-devid timer interrupt shared across CPUs.
> + minItems: 1
> + maxItems: 4
>
> clocks:
> maxItems: 1
> @@ -52,21 +53,31 @@ allOf:
> items:
> - description: VPE timers 0 and 1
> - description: VPE timers 2 and 3
> + interrupts:
> + description: An interrupt for each timer (one per VPE)
> + minItems: 4
> else:
> properties:
> reg:
> items:
> - description: VPE timers 0 and 1
> + interrupts:
> + description: A percpu-devid timer interrupt shared across timers
> + maxItems: 1
>
> additionalProperties: false
>
> examples:
> - |
> + #include <dt-bindings/interrupt-controller/mips-gic.h>
> timer@1fbf0400 {
> - compatible = "econet,en751627-timer", "econet,en751221-timer";
> + compatible = "econet,en751627-timer";
This is not going to pass dt_binding_check.
Please remove my ack until this is fixed.
> reg = <0x1fbf0400 0x100>, <0x1fbe0000 0x100>;
> interrupt-parent = <&intc>;
> - interrupts = <30>;
> + interrupts = <GIC_SHARED 30 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SHARED 29 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SHARED 36 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&hpt_clock>;
> };
> - |
> --
> 2.39.5
>
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next prev parent reply other threads:[~2026-05-16 23:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-16 21:57 [PATCH v4 0/4] clocksource/timer-econet-en751221: Support irq number per timer Caleb James DeLisle
2026-05-16 21:57 ` [PATCH v4 1/4] dt-bindings: timer: econet: Update EN751627 for multi-IRQ Caleb James DeLisle
2026-05-16 23:12 ` Conor Dooley [this message]
2026-05-16 23:25 ` Caleb James DeLisle
2026-05-16 23:33 ` Rob Herring (Arm)
2026-05-16 21:57 ` [PATCH v4 2/4] clocksource/timer-econet-en751221: Init teardown on error if possible Caleb James DeLisle
2026-05-16 21:57 ` [PATCH v4 3/4] clocksource/timer-econet-en751221: Disable IRQ until cevt registered Caleb James DeLisle
2026-05-16 21:57 ` [PATCH v4 4/4] clocksource/timer-econet-en751221: Support EN751627 without percpu IRQ Caleb James DeLisle
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