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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by CO1PEPF000075F4.mail.protection.outlook.com (10.167.249.43) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.48.11 via Frontend Transport; Sun, 17 May 2026 15:12:45 +0000 Received: from dcsm-trdripper1.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.41; Sun, 17 May 2026 10:12:43 -0500 From: Muralidhara M K To: CC: , , Muralidhara M K , Muthusamy Ramalingam Subject: [PATCH v3 4/7] platform/x86/amd/hsmp: Source metric-table size from firmware Date: Sun, 17 May 2026 20:42:08 +0530 Message-ID: <20260517151211.415627-5-muralidhara.mk@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260517151211.415627-1-muralidhara.mk@amd.com> References: <20260517151211.415627-1-muralidhara.mk@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F4:EE_|LV2PR12MB5893:EE_ X-MS-Office365-Filtering-Correlation-Id: 54c244b3-2d3b-4fe3-0b74-08deb426c016 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|1800799024|3023799003|11063799003|56012099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mQ4whrIBoEvBUgstyhkFswfpDoHA322oERbzJqpJysycXgMSJyXBifmfDx7OoP4LII5VTtXh/abdYYtcM+2NoEHNGptuzEB9dxbX8oFJD+JDB9g3i2P6KqxH0/KJLR3b4AkdmcHeM9rwStFtUtDd+kRbQApOHYY4UjkCR1YjOQjaBA7OfgDMl2r/68W27ljaPCO3msB/7E4m7YfvR1O2+/eDcTq/mBmU2pwE51WgvfkLQ1y0/+RSbf45d6IRFk6Fi83qGTCSDoW1g60tzbRJ/Wp6ikQaGlJAvwYXlylBm68BBuTjIWKlbwQsRaSr4nEIbv+vtdeNxj3HH/T6dKb6OoJTjqpmqtNkrEahCrgpDvMF+TBzGhY5cuuwAA/Vh+40gll5VT9iKXGPQIULCHJzTVvdSHrjxFWqY3TGDL+lvBACBBZ0k/lXCmqazhW0bgLs X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 May 2026 15:12:45.6274 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 54c244b3-2d3b-4fe3-0b74-08deb426c016 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5893 The driver currently hard-codes the metric-table region size to sizeof(struct hsmp_metric_table) when it ioremaps the DRAM region returned by HSMP_GET_METRIC_TABLE_DRAM_ADDR and when it validates buffer sizes in hsmp_metric_tbl_read(). That layout is fixed for HSMP protocol version 6, but Family 1Ah Model 50h-5Fh uses the larger struct hsmp_metric_table_zen6 (~13 KB), and future processors are expected to grow the table further. Pick up the table size from firmware instead: - Bump the hsmp_msg_desc_table[] entry for HSMP_GET_METRIC_TABLE_DRAM_ADDR from response_sz = 2 to 3 so msg.args[2] is read back. SMU on Family 1Ah Model 50h and later populates args[2] with the DRAM region size in bytes; older firmware leaves it as 0. - Add size_t hsmp_table_size to struct hsmp_plat_device, holding the metric-table size discovered at probe time. - In hsmp_get_tbl_dram_base(), set hsmp_pdev.hsmp_table_size to msg.args[2] when firmware reports a non-zero value, and fall back to sizeof(struct hsmp_metric_table) otherwise. Use the same value for the devm_ioremap() of the DRAM region so the full firmware-reported window is mapped. - In hsmp_metric_tbl_read(), validate the caller-supplied buffer size against hsmp_pdev.hsmp_table_size instead of the hard-coded sizeof(struct hsmp_metric_table). Behaviour is unchanged on existing protocol-version-6 hardware: firmware returns 0 in args[2], the driver falls back to sizeof(struct hsmp_metric_table), and both the ioremap and the size check produce the same result as before. The ioctl interface added later in this series uses hsmp_pdev.hsmp_table_size to size its kernel buffer, validate the userspace request, and copy out the full firmware-reported region for protocol-version-7 (and future) layouts that exceed the standard sysfs PAGE_SIZE read cap. Co-developed-by: Muthusamy Ramalingam Signed-off-by: Muthusamy Ramalingam Signed-off-by: Muralidhara M K --- Changes: v1->v2: New v2->v3: None arch/x86/include/uapi/asm/amd_hsmp.h | 5 +++-- drivers/platform/x86/amd/hsmp/hsmp.c | 11 ++++++++--- drivers/platform/x86/amd/hsmp/hsmp.h | 1 + 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/uapi/asm/amd_hsmp.h b/arch/x86/include/uapi/asm/amd_hsmp.h index da3e3bbfa33e..b86bbc929395 100644 --- a/arch/x86/include/uapi/asm/amd_hsmp.h +++ b/arch/x86/include/uapi/asm/amd_hsmp.h @@ -342,11 +342,12 @@ static const struct hsmp_msg_desc hsmp_msg_desc_table[] {0, 0, HSMP_GET}, /* - * HSMP_GET_METRIC_TABLE_DRAM_ADDR, num_args = 0, response_sz = 2 + * HSMP_GET_METRIC_TABLE_DRAM_ADDR, num_args = 0, response_sz = 3 * output: args[0] = lower 32 bits of the address * output: args[1] = upper 32 bits of the address + * output: args[2] = DRAM region size in bytes */ - {0, 2, HSMP_GET}, + {0, 3, HSMP_GET}, /* * HSMP_SET_XGMI_PSTATE_RANGE, num_args = 1, response_sz = 0/1 diff --git a/drivers/platform/x86/amd/hsmp/hsmp.c b/drivers/platform/x86/amd/hsmp/hsmp.c index 9bad58fef304..cf9392f99298 100644 --- a/drivers/platform/x86/amd/hsmp/hsmp.c +++ b/drivers/platform/x86/amd/hsmp/hsmp.c @@ -356,8 +356,7 @@ ssize_t hsmp_metric_tbl_read(struct hsmp_socket *sock, char *buf, size_t size) return -ENOMEM; } - /* Do not support lseek(), also don't allow more than the size of metric table */ - if (size != sizeof(struct hsmp_metric_table)) { + if (size != hsmp_pdev.hsmp_table_size) { dev_err(sock->dev, "Wrong buffer size\n"); return -EINVAL; } @@ -398,8 +397,14 @@ int hsmp_get_tbl_dram_base(u16 sock_ind) dev_err(sock->dev, "Invalid DRAM address for metric table\n"); return -ENOMEM; } + /* SMU returns table size from Family 1Ah Model 50h and forward */ + if (msg.args[2]) + hsmp_pdev.hsmp_table_size = msg.args[2]; + else + hsmp_pdev.hsmp_table_size = sizeof(struct hsmp_metric_table); + sock->metric_tbl_addr = devm_ioremap(sock->dev, dram_addr, - sizeof(struct hsmp_metric_table)); + hsmp_pdev.hsmp_table_size); if (!sock->metric_tbl_addr) { dev_err(sock->dev, "Failed to ioremap metric table addr\n"); return -ENOMEM; diff --git a/drivers/platform/x86/amd/hsmp/hsmp.h b/drivers/platform/x86/amd/hsmp/hsmp.h index b153527e0a0d..e7f051475728 100644 --- a/drivers/platform/x86/amd/hsmp/hsmp.h +++ b/drivers/platform/x86/amd/hsmp/hsmp.h @@ -55,6 +55,7 @@ struct hsmp_plat_device { u32 proto_ver; u16 num_sockets; bool is_probed; + size_t hsmp_table_size; }; int hsmp_cache_proto_ver(u16 sock_ind); -- 2.34.1