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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-302944ffdf0sm16288683eec.8.2026.05.18.22.47.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 22:47:23 -0700 (PDT) From: Qiang Yu Date: Mon, 18 May 2026 22:47:14 -0700 Subject: [PATCH RFC v4 3/9] phy: qcom: qmp-pcie: Add multiple power-domains support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260518-link_mode_0519-v4-3-269cd73cc5d1@oss.qualcomm.com> References: <20260518-link_mode_0519-v4-0-269cd73cc5d1@oss.qualcomm.com> In-Reply-To: <20260518-link_mode_0519-v4-0-269cd73cc5d1@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Bjorn Andersson , Konrad Dybcio Cc: Qiang Yu , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779169640; l=2515; i=qiang.yu@oss.qualcomm.com; s=20250513; h=from:subject:message-id; bh=0SfbZYNjk789aGYvSOXe+aw7DeVeyc7Kx10vw0KqrQw=; b=BO2RmfNFHbFIq1KEG1dO+4zWeOtGTTNbu/g4DipyMdJHGlwMB3onbNYR2YE0WyW5uigCUblZp mF6GK6wBoVLDmAnjOHt5c1QsCtCGbDlQ6NZBx1r0rE0ZjBjpKqDDYUp X-Developer-Key: i=qiang.yu@oss.qualcomm.com; a=ed25519; pk=Rr94t+fykoieF1ngg/bXxEfr5KoQxeXPtYxM8fBQTAI= X-Authority-Analysis: v=2.4 cv=VJPtWdPX c=1 sm=1 tr=0 ts=6a0bf96d cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=eu5IZVYEi8O4nexjJlAA:9 a=QEXdDO2ut3YA:10 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-ORIG-GUID: 5YELl543fQ5mrCnBtFeoTYq3GxnkM4du X-Proofpoint-GUID: 5YELl543fQ5mrCnBtFeoTYq3GxnkM4du X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDA1MyBTYWx0ZWRfXyL2zy/Z64g5s HHUn7OqBNQcYNgGwCbzPTF8CIdxpeGXLE6nqJMriKRIZkLzTsXYheGr4RqLUDh+7kD2d1MwAXdr 6TblM7YTosJYFyB8hYm8H+jRMmI5F8na5OKOuz6GHyx11x8TIet/jiL2QM9KJm+1EaQIvFwjx8+ pCtLEdmKafey4hhez+BbORbgziP/N4Gdc2gv268CxXBcT07Pa60KGmfzrTI6Bn2RlQntRfsmc/A 6obx4kVL+KXBl1histV4AMT/5VpUhVJZJELtcqQdq1j0OP3vfmje2VY/Wx7/IUcgCUdURzNVp/r FZ+ExJpOOMWkH1as+dNbaJRdstPPTrO9YdsJtLc1o1SqUyYV71emds8+eKFTvQOO64YtC5Jy23/ NNBQ7Gh5jqRXiV82fcbFEtoc5jX/211wDEaYTiSRdbFe+UBBfaq/kVGB/qdtNZeOl8CtacwBzrg fSSc+Zz5Pqo1delAq8A== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 adultscore=0 malwarescore=0 bulkscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190053 The Glymur SoC's 3rd PCIe instance supports 8-lane mode using two PHYs in a bifurcated configuration. Each PHY has its own power domain (phy_gdsc) that must be powered on before initialization per hardware requirements. Current PHY power management assumes a single power domain per PHY, preventing proper setup for this dual-PHY scenario. Add support for multiple power domains by using devm_pm_domain_attach_list() to attach power domains manually, while maintaining compatibility with single power domain PHYs. Enable runtime PM to allow power domain control when the PCIe driver calls phy_power_on/phy_power_off: - Single power domain: QMP PHY platform device directly attaches to power domain and controls it during runtime resume/suspend - Multiple power domains: devm_pm_domain_attach_list() creates virtual devices as power domain suppliers, linked to the QMP PHY platform device as consumer This ensures power domains are properly attached and turned on/off for both single and multiple power domain configurations. Reviewed-by: Dmitry Baryshkov Signed-off-by: Qiang Yu --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 75afbd15aaf4..832b5d93105b 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -5329,6 +5330,7 @@ static int qmp_pcie_parse_dt(struct qmp_pcie *qmp) static int qmp_pcie_probe(struct platform_device *pdev) { + struct dev_pm_domain_list *pd_list; struct device *dev = &pdev->dev; struct phy_provider *phy_provider; struct device_node *np; @@ -5348,6 +5350,16 @@ static int qmp_pcie_probe(struct platform_device *pdev) WARN_ON_ONCE(!qmp->cfg->pwrdn_ctrl); WARN_ON_ONCE(!qmp->cfg->phy_status); + ret = devm_pm_domain_attach_list(dev, NULL, &pd_list); + if (ret < 0 && ret != -EEXIST) { + dev_err(dev, "Failed to attach power domain\n"); + return ret; + } + + ret = devm_pm_runtime_enable(dev); + if (ret) + return ret; + ret = qmp_pcie_clk_init(qmp); if (ret) return ret; -- 2.34.1