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Mon, 18 May 2026 00:14:56 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , "Moshe Shemesh" , Akiva Goldberger , , , , Gal Pressman , Dragos Tatulea , Simon Horman Subject: [PATCH net-next V2 0/8] net/mlx5: Prepare eswitch infrastructure for satellite PF support Date: Mon, 18 May 2026 10:13:48 +0300 Message-ID: <20260518071356.345723-1-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003442:EE_|IA0PPFF4B476A86:EE_ X-MS-Office365-Filtering-Correlation-Id: 3ef01f6c-d88f-494a-62ac-08deb4ad32de X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|82310400026|36860700016|56012099003|18002099003|13003099007|11063799003; X-Microsoft-Antispam-Message-Info: JVhcbrAwz+cndQ3NAi8CFrW9TnF8ey/VDfisoUbfPuqkGhq7iZADoPrYmsHigIsCUaujrF+GrQTSZopeVRq3fLow2eY06ioXMeN7XZpZyiQX/6XjNPO1iYNzhLRoh6mcciC6LCQ2jv5gOSKj9FbP98X5f7mBZv1ZVOYneAd4ssGflzG9NVSUBl8lupu7+D9HB2R+SXW5d7kmGInoTrBN2URTWz8Pr8WmMM7/L4TqnSNj66AVDmmhIsUn/56FmJzBBmKfYn+JgFRmZ6wJpjlxAJtmMqmvyVuMnkC2yMhLM27WL+RTeHfIQoMMl2xCmbDwumqP+CekIn+EAyxovHOmwKADLWerpqgtMu9AtHTBdU7V3leo7HlIO9ezVRBuJutgbGfXo9V9R02ludhWftMfv7UGhKSdTkh1gY6JvodwX74BILMQRYcawkijvnvmmre15jVU2soc5vwPxO0zmYz2KJE/RkeLLOPs1Ry0ZN91niOWSA2NOFfTVhvzDbVP+ElGEnJwJW5uWv0+Espp8gHomJC+0nIQ34DGSvgsEWSrEtjqBeOus87vzdcN6XsPh2sfWKgf9ciCmQRtb8+hr2uAyPSLx7eeV5VBzOlQLX91bx+yRudBPmqoj4tu62w88FDbd1TiUY8CRNzSFlQLMRvXg+frtSSr2zjnRUyxGB9lb2wyDhQnXSazOIueJt03VfIluJHsb79HTAQKe6kufGnsLLIOwcn2Z9oNmndCiDrWibk= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(376014)(1800799024)(82310400026)(36860700016)(56012099003)(18002099003)(13003099007)(11063799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0yqgBS0wfTE9LntWQmx6Ygk1Wv2jM3Ypc9I4AokDbZibH07h9wlYOOeM4Fku1tB06eCD7UGkBpRFmvVRg2QEAlKu1F1gXqD118xhjWY9QV4nY/KQJ/zn0OBXkBaQQ+AHNB2SoFNAi6qAUcSWksBtEauX1/0Jh4wORy/n11TJFvWhPtTMsNjMyuz/qehez98yDML5gioE3f5TEkeIyHpU4az93NOEZ5t9BvJnIW3GkH/u6HLZNdBofGbvNRbudg1cakq23T8YBOwI95X9f56uLEtuVHcHAe85OrO0TqhDsrJbed7y4uAhGHPhExkvwfDs25u4qkIkWmPNRJZgTVZVT39BKGMu1IHqPKNcrU3PgcYT6ywRfzbMVL7yo/r2tP4fpQw6iKBiWx3iGtq1EO6rkmX9Wj8j5boerE6L1jX+1LblUWdMHiTlcDKQRBlC8siD X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 07:15:10.7502 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3ef01f6c-d88f-494a-62ac-08deb4ad32de X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003442.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PPFF4B476A86 Hi, See detailed description by Moshe below. Regards, Tariq A satellite PF is a new SmartNIC configuration that adds another physical function on the DPU that is not an eswitch manager and not a page manager. The satellite PF can have its own SFs and can be passed through to a VM on the DPU, providing an isolated function for users who should not have access to the privileged ECPF. The ECPF handles the satellite PF and the host PF in a similar way, using the same management framework. This series prepares the mlx5 eswitch command interface and vport infrastructure for satellite PF support. The first two patches abstract host PF data parsing behind a helper and switch to the v1 response layout for query_esw_functions when supported, so callers are insulated from layout differences. The IPsec VF checks are tightened to use mlx5_eswitch_is_vf_vport() instead of comparing against a specific vport number. The remaining patches refactor SET_HCA_CAP and enable/disable_hca command helpers to support vhca_id-based addressing, which is required for managing functions that are not directly addressable by function_id. A follow-up series will introduce satellite PF discovery and management using this infrastructure. V2: - Add clarifications on vhca states of PFs. - Add background on satellite PF feature. V1: https://lore.kernel.org/all/20260510053448.326823-1-tariqt@nvidia.com/ Moshe Shemesh (8): net/mlx5: Use helper to parse host PF info net/mlx5: Use v1 response layout for query_esw_functions net/mlx5: Use mlx5_eswitch_is_vf_vport() for IPsec VF checks net/mlx5: Switch vport HCA cap helpers to kvzalloc net/mlx5: Add mlx5_vport_set_other_func_general_cap macro net/mlx5: Refactor mlx5_set_msix_vec_count() SET_HCA_CAP net/mlx5: Use vport helper for IPsec eswitch set caps net/mlx5: Generalize enable/disable HCA for any PF vport .../net/ethernet/mellanox/mlx5/core/ecpf.c | 24 ++- .../net/ethernet/mellanox/mlx5/core/ecpf.h | 4 +- .../ethernet/mellanox/mlx5/core/esw/ipsec.c | 83 +++------ .../net/ethernet/mellanox/mlx5/core/eswitch.c | 157 +++++++++++++++--- .../net/ethernet/mellanox/mlx5/core/eswitch.h | 16 ++ .../mellanox/mlx5/core/eswitch_offloads.c | 38 ++--- .../ethernet/mellanox/mlx5/core/mlx5_core.h | 6 + .../net/ethernet/mellanox/mlx5/core/pci_irq.c | 27 +-- .../net/ethernet/mellanox/mlx5/core/sriov.c | 8 +- .../net/ethernet/mellanox/mlx5/core/vport.c | 12 +- 10 files changed, 227 insertions(+), 148 deletions(-) base-commit: 627ac78f2741e2ebd2225e2e953b6964a8a9182f -- 2.44.0