From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1C1F3F23A3; Mon, 18 May 2026 15:35:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779118545; cv=none; b=jicK5rD0xIPXZbvBp/LAA/xJY311x11e0275uztg5gzrGJgf0huWXqoTOMk6Gr70uuC0uSrO8ig65TeyHeGnK6lPJBGGwvhAYE4RZQBHFPiSxyWHP25Vt5cjdST47j4q8L5e/kB/3YBn9iZK7OUJcqhvKAlG1xXIeiHKbVp+hfg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779118545; c=relaxed/simple; bh=sYIhf9JmRahZxPSD9uuyJqPOBKnqcQVlrS2lbbbjpi4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BUyKF+lcN9LR3+VM5r0JuwUzhxftbmM+LZxZuheOmvYXEgNuKjtE54xvNuoqxOGKwtNY/8KKDHIdljrJ1kGOaBjj+5lXN+TJGE48bkttxdiqgWu+f/k4eF7rFtJ2F9DSIwaNeiCwkbRf9ZMb6/BiMzg25qAB7Y/uUVrO4Yx3wUc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 7B1AC1F8005A; Mon, 18 May 2026 15:35:41 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id E3146B407FE; Mon, 18 May 2026 15:35:40 +0000 (UTC) X-Spam-Level: * Received: from collins (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 2C7BDB407FE; Mon, 18 May 2026 15:33:42 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Brian Masney , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v9 3/9] clk: sunxi-ng: v3s: Export MBUS and DRAM clocks to the public header Date: Mon, 18 May 2026 17:33:32 +0200 Message-ID: <20260518153339.619947-4-paulk@sys-base.io> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260518153339.619947-1-paulk@sys-base.io> References: <20260518153339.619947-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Paul Kocialkowski In order to declare a mbus node for the v3s, expose its associated clocks to the public header. Signed-off-by: Paul Kocialkowski Reviewed-by: Samuel Holland Acked-by: Rob Herring --- drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 4 ---- include/dt-bindings/clock/sun8i-v3s-ccu.h | 4 ++-- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h index 345cdbbab362..c933ef016570 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h @@ -39,14 +39,10 @@ /* The first bunch of module clocks are exported */ -#define CLK_DRAM 58 - /* All the DRAM gates are exported */ /* Some more module clocks are exported */ -#define CLK_MBUS 72 - /* And the GPU module clock is exported */ #define CLK_PLL_DDR1 74 diff --git a/include/dt-bindings/clock/sun8i-v3s-ccu.h b/include/dt-bindings/clock/sun8i-v3s-ccu.h index c4055629c9f9..d635bffd6914 100644 --- a/include/dt-bindings/clock/sun8i-v3s-ccu.h +++ b/include/dt-bindings/clock/sun8i-v3s-ccu.h @@ -87,7 +87,7 @@ #define CLK_SPI0 55 #define CLK_USB_PHY0 56 #define CLK_USB_OHCI0 57 - +#define CLK_DRAM 58 #define CLK_DRAM_VE 59 #define CLK_DRAM_CSI 60 #define CLK_DRAM_EHCI 61 @@ -101,7 +101,7 @@ #define CLK_VE 69 #define CLK_AC_DIG 70 #define CLK_AVS 71 - +#define CLK_MBUS 72 #define CLK_MIPI_CSI 73 /* Clocks not available on V3s */ -- 2.54.0