From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3238D3AB293 for ; Mon, 18 May 2026 22:21:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779142871; cv=none; b=qii6ibWBhoIJ1KMUuphcsAGaGIzNmalYcVO+FEXyx1+eRjHuY3M67LjJEFviEZ90KfgT4tqYJyxl6qhoKwhq1cOmvy9YjFj0ZvDPLZbUAXy709iELrrQRBK7J5j8A5SkDHm3KeutBHubGKZT32/NB8V9KxpquWW8Da7oXp4MPUs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779142871; c=relaxed/simple; bh=5vcQOwcI8UydaSanIHiEgv1spygCi6hpr4FipFcJtlM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iE0isY21q/AH872UdNWlKLXFcigsbUTr3ntAs2buo9hZnkNJG/2z5dwcCEtbm9yIfBRmDru8oimuVXcHasK9v400Xk8neraGUww4pfHwlWp8k6fDe68E1tUZfCveQO+wpc4ThG3AALsrBrenGNIzYlbhJwHjQsTEchd3d7+JhLQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZrR2Hlq7; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZrR2Hlq7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1779142869; x=1810678869; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5vcQOwcI8UydaSanIHiEgv1spygCi6hpr4FipFcJtlM=; b=ZrR2Hlq78hz3thC/MgkLJ2mP4z8n8xqz9e9XOrSA6A2DInqQso+6esZ9 XaaLXhx+ATvtpzdASa6xw1XQq0EeXiHVeUIXzB1q7OQZKlitxvtkV0Jia DFEifodPfGxqxWBvTFFAqKwLOYNRXdAusKBt7IzeqbyR3y/bIO2HxlTJg O8iABNOuGeK+Woep/Oyb5OPPZI/GxIRD/0keUOpPbnZ+enPLkKvtgDEeo X+IK9WhFJcVRWmDCL9LdEvIumfcLc5VnD2t6a5iOLy1lqg4lpDea+UOpR LM2dUV1seNVOWotTpvqc1DyAb/sa05QgpAXMgE7Gwgu5RDP8uzso01qew g==; X-CSE-ConnectionGUID: UicIVfslT+OrLKPY2JEnDQ== X-CSE-MsgGUID: BMH8lF3DSIOgOlSZ7du6XQ== X-IronPort-AV: E=McAfee;i="6800,10657,11790"; a="90317873" X-IronPort-AV: E=Sophos;i="6.23,242,1770624000"; d="scan'208";a="90317873" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2026 15:21:07 -0700 X-CSE-ConnectionGUID: 4p/+LG72QTmtjwU3m5gm4Q== X-CSE-MsgGUID: G51MuBRPRxyVg4aJo1rOMw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,242,1770624000"; d="scan'208";a="244564553" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa005.jf.intel.com with ESMTP; 18 May 2026 15:21:06 -0700 From: Sohil Mehta To: Dave Hansen , Borislav Petkov , x86@kernel.org Cc: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Josh Poimboeuf , Richard Weinberger , Andrew Cooper , Tony Luck , Sohil Mehta , "Ahmed S . Darwish" , linux-kernel@vger.kernel.org Subject: [PATCH v3 3/3] x86/cpufeature: Remove clear_cpu_bug() Date: Mon, 18 May 2026 15:17:18 -0700 Message-ID: <20260518221718.3303288-4-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518221718.3303288-1-sohil.mehta@intel.com> References: <20260518221718.3303288-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Richard Weinberger X86_BUG_F00F was the last remaining user of clear_cpu_bug(). With no users left, remove this helper. Signed-off-by: Richard Weinberger Signed-off-by: Sohil Mehta Reviewed-by: Ahmed S. Darwish --- v3: - Picked up Ahmed's review tag. v2: - Improve commit message --- arch/x86/include/asm/cpufeature.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 3ddc1d33399b..90680f978d43 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -125,7 +125,6 @@ static __always_inline bool _static_cpu_has(u16 bit) #define cpu_has_bug(c, bit) cpu_has(c, (bit)) #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) -#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) #define static_cpu_has_bug(bit) static_cpu_has((bit)) #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) -- 2.43.0