From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 13F3722A4E9 for ; Wed, 20 May 2026 07:36:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779262571; cv=none; b=FeSEDkFP5MjNPUOQTUpieARoYyaoinM8/ptBhZfSKPCD4RigZyiH10fZZ9s4Yw6b7gGb7yBFqyNHHtsg5GfMXMgzY47hGG2hqyC82kk6GD7J67Zt9P9LXOjvPbPECh9QHN2RluSwbDa87TN7c47JwM/mQ0004oj+iEdO4xRWwFQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779262571; c=relaxed/simple; bh=sYdaitZv5dkRp/Ged886p12EW23XCkqhilQuKp2wxV0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=OLX2trlqec8/XDDnJRFegqBQXLxsg0ymHijbWxdfet4K6Nfpjl0L/QmLsTORk8kYh+Rv9cpcuakZAuBlUerLYbWAeduRqqr/PLcvG2oep5IfDvZX/5k+fLEtceUlfzXT5bEz/GnsFtjcLIiPD7qAAJ6og3AjWsPaXpwgym+9KSY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=FsZwkMuY; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="FsZwkMuY" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0B7412573; Wed, 20 May 2026 00:36:04 -0700 (PDT) Received: from localhost (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AF77E3F632; Wed, 20 May 2026 00:36:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1779262569; bh=sYdaitZv5dkRp/Ged886p12EW23XCkqhilQuKp2wxV0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=FsZwkMuYPdJjbd+uWeHrTMuO7KtRfhowNxvGNk2PZMiT/o//ONWk4So2wKny3H+cy /h/vTyLz/YHkC6UqojzNoOKqMpOXu/jg+h6BCLG+Tz/rzVoCAXUgAJC2LIRp/+b73l ZctgPq86gTv7/qmNxGhv2luUNMYvBwIIDaVyIJcg= Date: Wed, 20 May 2026 08:36:06 +0100 From: Leo Yan To: Justinien Bouron Cc: Catalin Marinas , Will Deacon , David Hildenbrand , Mark Rutland , Ryan Roberts , Ada Couprie Diaz , Kevin Brodsky , Lorenzo Stoakes , Quentin Perret , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Gunnar Kudrjavets Subject: Re: [PATCH] arm64: Add user and kernel page-fault tracepoints Message-ID: <20260520073606.GA101133@e132581.arm.com> References: <20260520045524.75670-1-jbouron@amazon.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260520045524.75670-1-jbouron@amazon.com> On Tue, May 19, 2026 at 09:55:24PM -0700, Justinien Bouron wrote: [...] > @@ -606,6 +609,11 @@ static int __kprobes do_page_fault(unsigned long far, unsigned long esr, > int si_code; > int pkey = -1; > > + if (user_mode(regs)) > + trace_page_fault_user(addr, regs, esr); > + else > + trace_page_fault_kernel(addr, regs, esr); Based on the discussion [1], Arm64 has already supported perf sw event for page-faults: perf record -e page-faults ... Seems there have a plan to consolidate perf event and tracepoints but I have no idea how it is going. I would leave this to maintainers. > + > if (kprobe_page_fault(regs, esr)) > return 0; tracepoints should be after kprobe_page_fault(), as explained [2] by Mark. Thanks, Leo [1] https://lore.kernel.org/all/20250520140453.GA18711@willie-the-truck/ [2] https://lore.kernel.org/all/aCtZfiU8bgkSAgLh@J2N7QTR9R3/