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Wed, 20 May 2026 07:00:52 -0500 From: Rishikesh Donadkar To: , , CC: , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v13 04/17] media: ti: j721e-csi2rx: prepare SHIM code for multiple contexts Date: Wed, 20 May 2026 17:30:09 +0530 Message-ID: <20260520120022.539913-5-r-donadkar@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260520120022.539913-1-r-donadkar@ti.com> References: <20260520120022.539913-1-r-donadkar@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06E:EE_|BN0PR10MB5160:EE_ X-MS-Office365-Filtering-Correlation-Id: b4dc1928-8c5b-44f0-2a92-08deb6677f87 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|7416014|376014|82310400026|56012099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Rn0GkUp4StvTeGsRJz3cRt8RdLKy5GorGXjeQV+0S+9I+F6hOe4ux99Larxnlfn/bBcJ9gQFDsv3pTmG7F5XoiOVxv1FxWnI9IjRC/lbPj9DB0FDco8bGt41R7bu3QGvlFTQCGpEe7ezu0NU+1ucc0QsQx/t5nrBp3u6UVaBqowiTKbUy1IHstRwt0BfF57xteqn1rY8FS7yU1NQxrbqh50MvP+DuWMuoqa7ZBUfnw2R0LLfIyX8I8Sy966kIplFJeSqIonL5ekBAqiVTtLlOnyUgAXjYmE9O40OR5cbN5RNSBZ9Y9cDZ2mosr5rKJ6VVLrN+Z1OujcstECSd9lZXZeLCeAxHK3Ja5GA9CxlR0mU1kUa5tRMSgWH0rgcDyKuc6Pv8Yk7jEys4k99VQb3VNonVNrXiWzwY47tWLJlsVgS23ldeW9iHGIABDzKYZ94 X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2026 12:01:16.9914 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b4dc1928-8c5b-44f0-2a92-08deb6677f87 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.195];Helo=[flwvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06E.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN0PR10MB5160 From: Pratyush Yadav Currently the SHIM code to configure the context only touches the first context. Add support for writing to the context's registers based on the context index. Signed-off-by: Pratyush Yadav Signed-off-by: Jai Luthra Reviewed-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Yemike Abhilash Chandra Reviewed-by: Tomi Valkeinen Signed-off-by: Rishikesh Donadkar --- .../media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c index 23717a3b6c4c..4adfae425f19 100644 --- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c +++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c @@ -27,7 +27,7 @@ #define SHIM_CNTL 0x10 #define SHIM_CNTL_PIX_RST BIT(0) -#define SHIM_DMACNTX 0x20 +#define SHIM_DMACNTX(i) (0x20 + ((i) * 0x20)) #define SHIM_DMACNTX_EN BIT(31) #define SHIM_DMACNTX_YUV422 GENMASK(27, 26) #define SHIM_DMACNTX_DUAL_PCK_CFG BIT(24) @@ -38,7 +38,7 @@ #define SHIM_DMACNTX_SIZE_16 1 #define SHIM_DMACNTX_SIZE_32 2 -#define SHIM_PSI_CFG0 0x24 +#define SHIM_PSI_CFG0(i) (0x24 + ((i) * 0x20)) #define SHIM_PSI_CFG0_SRC_TAG GENMASK(15, 0) #define SHIM_PSI_CFG0_DST_TAG GENMASK(31, 16) @@ -568,11 +568,11 @@ static void ti_csi2rx_setup_shim(struct ti_csi2rx_ctx *ctx) break; } - writel(reg, csi->shim + SHIM_DMACNTX); + writel(reg, csi->shim + SHIM_DMACNTX(ctx->idx)); reg = FIELD_PREP(SHIM_PSI_CFG0_SRC_TAG, 0) | FIELD_PREP(SHIM_PSI_CFG0_DST_TAG, 0); - writel(reg, csi->shim + SHIM_PSI_CFG0); + writel(reg, csi->shim + SHIM_PSI_CFG0(ctx->idx)); } static void ti_csi2rx_drain_callback(void *param) @@ -890,7 +890,7 @@ static int ti_csi2rx_start_streaming(struct vb2_queue *vq, unsigned int count) err_pipeline: video_device_pipeline_stop(&ctx->vdev); writel(0, csi->shim + SHIM_CNTL); - writel(0, csi->shim + SHIM_DMACNTX); + writel(0, csi->shim + SHIM_DMACNTX(ctx->idx)); err: ti_csi2rx_cleanup_buffers(ctx, VB2_BUF_STATE_QUEUED); return ret; @@ -905,7 +905,7 @@ static void ti_csi2rx_stop_streaming(struct vb2_queue *vq) video_device_pipeline_stop(&ctx->vdev); writel(0, csi->shim + SHIM_CNTL); - writel(0, csi->shim + SHIM_DMACNTX); + writel(0, csi->shim + SHIM_DMACNTX(ctx->idx)); ret = v4l2_subdev_call(csi->source, video, s_stream, 0); if (ret) -- 2.34.1