From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A5DF63806C7 for ; Wed, 20 May 2026 21:25:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779312345; cv=none; b=dGJ2rQTmnN+jzmHAjvTKujZKjtqMfyFl14aUUtq7P6PJ8fJMAYhpdQny83gQ38VB08FFnHp55Pm22ynSaxgNFAsSdMkbZvrMc6qlBamcnzXah5nhys/gZlqS+v7MstA9TWRLiW35mEuRPGdrL8/2LaybHSzhryKBFuhziMCTl9o= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779312345; c=relaxed/simple; bh=wIKzf5ul/e8eANNandonrCHt67Qv+ziekknEc/tHdes=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ji7y8ErUddEpwfA3+RyzuL6f5JTGROep95QSv141bNfvpqGa1KgR5kzlLZP2S+URQmS0zCR7o8O0ea+IYFffLvTN6J0RV0Ms+gD7O36SYiIbnfnBjZxaWWeQ8vId7acyMuopU/zbSyqt03ChIRjjGZ+U7XOnlE+z5vD4zR9yA70= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=bqBW2Zxu; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="bqBW2Zxu" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D9E964923; Wed, 20 May 2026 14:25:37 -0700 (PDT) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B294C3F632; Wed, 20 May 2026 14:25:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1779312343; bh=wIKzf5ul/e8eANNandonrCHt67Qv+ziekknEc/tHdes=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bqBW2ZxuSoMTm02aZ9wHS6bdFRPTNmNOahYi2pDBykKswCPmhIM7GOJbjpQ4Sr4/k pAocUen0g9FFhjKaZMpY8cB2UTsYg8Ky5Nr8vQDcbxQ22K5Q3ev0+yF3I2+Nh0cER/ 74WMZgz1l/IchZcXy2P3SoDq2Ji1bnraVDmba7Uo= From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jic23@kernel.org, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, zengheng4@huawei.com, x86@kernel.org Subject: [PATCH v4 5/5] arm64: mpam: Add memory bandwidth usage (MBWU) documentation Date: Wed, 20 May 2026 22:24:58 +0100 Message-ID: <20260520212458.1797221-6-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260520212458.1797221-1-ben.horgan@arm.com> References: <20260520212458.1797221-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Memory bandwidth monitoring make uses of MBWU monitors and is now exposed to the user via resctrl. Add some documentation so the user knows what to expect. Co-developed-by: James Morse Signed-off-by: James Morse Signed-off-by: Ben Horgan --- Documentation/arch/arm64/mpam.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/arch/arm64/mpam.rst b/Documentation/arch/arm64/mpam.rst index 570f51a8d4eb..208ff17068c4 100644 --- a/Documentation/arch/arm64/mpam.rst +++ b/Documentation/arch/arm64/mpam.rst @@ -65,6 +65,23 @@ The supported features are: there is at least one CSU monitor on each MSC that makes up the L3 group. Exposing CSU counters from other caches or devices is not supported. +* Memory Bandwidth Usage (MBWU) on or after the L3 cache. resctrl uses the + L3 cache-id to identify where the memory bandwidth is measured. For this + reason the platform must have an L3 cache with cache-id's supplied by + firmware. (It doesn't need to support MPAM.) + + Memory bandwidth monitoring makes use of MBWU monitors in each MSC that + makes up the L3 group. If the memory bandwidth monitoring is on the memory + rather than the L3 then there must be a single global L3 as otherwise it + is unknown which L3 the traffic came from. + + To expose 'mbm_total_bytes', the topology of the group of MSC chosen must + match the topology of the L3 cache so that the cache-id's can be + repainted. For example: Platforms with Memory bandwidth monitors on + CPU-less NUMA nodes cannot expose 'mbm_total_bytes' as these nodes do not + have a corresponding L3 cache. 'mbm_local_bytes' is not exposed as MPAM + cannot distinguish local traffic from global traffic. + Reporting Bugs ============== If you are not seeing the counters or controls you expect please share the -- 2.43.0