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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2bea917318esm10435555ad.5.2026.05.21.05.16.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 05:16:39 -0700 (PDT) From: Yingchao Deng Subject: [PATCH v9 0/4] Add Qualcomm extended CTI support Date: Thu, 21 May 2026 20:16:26 +0800 Message-Id: <20260521-extended_cti-v9-0-d21f4f92c51e@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAJv3DmoC/x3MQQqAIBBG4avErBMmzaiuEhGRvzUbC40IorsnL b/Few8lREGivngo4pIke8joyoKWbQ4rlLhs0qwbtpoV7hPBwU3LKcqwhau0Z1O3lJMjwsv974b xfT8Puy24XgAAAA== To: Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , Alexander Shishkin Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jinlong.mao@oss.qualcomm.com, quic_yingdeng@quicinc.com, tingwei.zhang@oss.qualcomm.com, jie.gan@oss.qualcomm.com, Yingchao Deng X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779365796; l=5452; i=yingchao.deng@oss.qualcomm.com; s=20260521; h=from:subject:message-id; bh=aSagP+Ntd8ExqIv/bmaQy6rZMayOFWItjxgrrEoG8Mg=; b=cV9FjF0Xo53AU67TtHOGcvo2RDNaE1U49xBnIOkD69p4q7X01HoiDSaL0kNjJMlrribCKbyT3 7EJ6VCljjgEBLBPxnUyZLdJcdqibpp/LkSjcYeQlKgjIQwJ0CXZAGz7 X-Developer-Key: i=yingchao.deng@oss.qualcomm.com; a=ed25519; pk=YbHeeX0Qzqo7voZLva784lFhVChB9yF3a4sceW95ljA= X-Authority-Analysis: v=2.4 cv=c/ibhx9l c=1 sm=1 tr=0 ts=6a0ef7a9 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=xEwI6Y9Ks9AXzKRB910A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: kwCgUG2UyaT2FJcUsyQUDJlMjqXbCv76 X-Proofpoint-ORIG-GUID: kwCgUG2UyaT2FJcUsyQUDJlMjqXbCv76 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIxMDEyMyBTYWx0ZWRfX5fCXwU4RahLO BWpJ1HdLFgsxRgwwIwVj3BrO+3gc7Q6yGpycOiiSM1xEiYgM0byDX/jP10vCu6lnHMFWi/F8t67 4x91pbwBhmA1FbVM6GvTzUhpTMB+oP2GKdmyUgfm2ySjZBXOeDS/h8RcDDrw5c6q+vsFrA9/NQV NCV5DGyuFmDt0v302JJDEd4lpUZux1mtCzQftHartuxDKoM+cn04zYk7RzdwHaXdeHlllmy2ime 3pY6g8b9SeIyX83P8GgKyf4bRcJ8sek5DKbxddEXTg3pcjJK+qLGVyAx0T9GZ56mhe7MQ2DRp0k Bxlc2fbuTMPXMH4m7kOhDJgMKoSlAGuwtYsCSFgIH9PLcOY62tPSb2gyjgQHkkJZ97idldglfX4 pebfTYqnw7fV5S4wRx75sgAqumcwOc+sJooopwhEvUaZA0iNApVTQg32i1t7iMZscKnh8jK3xZq QEYGG2EwDdrVsuzacyQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-21_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 priorityscore=1501 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605210123 The Qualcomm extended CTI is a heavily parameterized version of ARM’s CSCTI. It allows a debugger to send to trigger events to a processor or to send a trigger event to one or more processors when a trigger event occurs on another processor on the same SoC, or even between SoCs. Qualcomm extended CTI supports up to 128 triggers. And some of the register offsets are changed. The commands to configure CTI triggers are the same as ARM's CTI. Prerequisites: This series depends on the following CoreSight fix: [PATCH v2 1/1] coresight: fix issue where coresight component has no claimtags Link: https://lore.kernel.org/all/20251027223545.2801-2-mike.leach@linaro.org/ Changes in v9: 1. rebase on top of linux-next-20260518. 2. patch 2: Replace the "encode index into offset high bits" scheme with a cleaner __reg_addr(drvdata, off, index) helper; update cti_read/write_single_reg() to take separate off and index arguments; add u32 index field to cs_off_attribute (moved to coresight-priv.h); drop CTI_REG_SET/GET/CLR_NR macros and ; update commit subject accordingly. 3. patch 4: Add three index-aware sysfs macros (coresight_cti_reg_index, _rw_index, _wo_index); replace string-matching visibility logic with cs_off_attribute.index field check; Link to v8 - https://lore.kernel.org/all/20260426-extended-cti-v8-0-23b900a4902f@oss.qualcomm.com/ Changes in v8: 1. Rebased on top of linux-next-20260424. 2. patch 1: Use devm_bitmap_zalloc() with nr_trig_max instead of per-connection signal counts; add bitmap_zalloc() for filter trigger group. 3. patch 2: Add #include ; move CTIINOUTEN_MAX expansion to patch3. 4. patch 3: wrap CLAIMSET clear with CS_UNLOCK/CS_LOCK; move CTIINOUTEN_MAX to 128 here with comment; fix macro alignment in qcom-cti.h. 5. patch 4: Make qcom_suffix_registers[] static. Link to v7 - https://lore.kernel.org/all/20260325-extended_cti-v7-0-bb406005089f@oss.qualcomm.com/ Changes in v7: 1. Split the extended CTI support into smaller, logically independent patches to improve reviewability. 2. Removed the dual offset-array based register access used in v6 for standard and Qualcomm CTIs. Register addressing is now unified through a single code path by encoding the register index together with the base offset and applying variant-specific translation at the final MMIO access point. 3. Removed ext_reg_sel, extend the CTI sysfs interface to expose banked register instances on Qualcomm CTIs only. Numbered sysfs nodes are hidden on standard ARM CTIs, and on Qualcomm CTIs their visibility is derived from nr_trig_max (32 triggers per bank), ensuring that only registers backed by hardware are exposed. Link to v6 - https://lore.kernel.org/all/20251202-extended_cti-v6-0-ab68bb15c4f5@oss.qualcomm.com/ Changes in v6: 1. Rename regs_idx to ext_reg_sel and add information in documentation file. 2. Reset CLAIMSET to zero for qcom-cti during probe. 3. Retrieve idx value under spinlock. 4. Use yearless copyright for qcom-cti.h. Link to v5 - https://lore.kernel.org/all/20251020-extended_cti-v5-0-6f193da2d467@oss.qualcomm.com/ Changes in v5: 1. Move common part in qcom-cti.h to coresight-cti.h. 2. Convert trigger usage fields to dynamic bitmaps and arrays. 3. Fix holes in struct cti_config to save some space. 4. Revert the previous changes related to the claim tag in cti_enable/disable_hw. Link to v4 - https://lore.kernel.org/linux-arm-msm/20250902-extended_cti-v4-1-7677de04b416@oss.qualcomm.com/ Changes in v4: 1. Read the DEVARCH registers to identify Qualcomm CTI. 2. Add a reg_idx node, and refactor the coresight_cti_reg_show() and coresight_cti_reg_store() functions accordingly. 3. The register offsets specific to Qualcomm CTI are moved to qcom_cti.h. Link to v3 - https://lore.kernel.org/linux-arm-msm/20250722081405.2947294-1-quic_jinlmao@quicinc.com/ Changes in v3: 1. Rename is_extended_cti() to of_is_extended_cti(). 2. Add the missing 'i' when write the CTI trigger registers. 3. Convert the multi-line output in sysfs to single line. 4. Initialize offset arrays using designated initializer. Link to V2 - https://lore.kernel.org/all/20250429071841.1158315-3-quic_jinlmao@quicinc.com/ Changes in V2: 1. Add enum for compatible items. 2. Move offset arrays to coresight-cti-core Signed-off-by: Yingchao Deng --- Yingchao Deng (4): coresight: cti: Convert trigger usage fields to dynamic coresight: cti: use __reg_addr() helper for register access coresight: cti: add Qualcomm extended CTI identification and quirks coresight: cti: expose banked sysfs registers for Qualcomm extended CTI drivers/hwtracing/coresight/coresight-cti-core.c | 131 ++++++++++++++++----- .../hwtracing/coresight/coresight-cti-platform.c | 26 ++-- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 97 ++++++++++++--- drivers/hwtracing/coresight/coresight-cti.h | 28 +++-- drivers/hwtracing/coresight/coresight-priv.h | 4 +- drivers/hwtracing/coresight/qcom-cti.h | 65 ++++++++++ 6 files changed, 281 insertions(+), 70 deletions(-) --- base-commit: f0d051a4a0ad6d37c1a88fee7f6a611f2e3dfa77 change-id: 20260520-extended_cti-305ed12f0348 Best regards, -- Yingchao Deng