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Thu, 21 May 2026 04:12:09 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , "Simon Horman" , Adithya Jayachandran , Jiri Pirko , Moshe Shemesh , Or Har-Toov , Shay Drori , Parav Pandit , Daniel Jurgens , Kees Cook , Cosmin Ratiu , Carolina Jubran , , , , Gal Pressman Subject: [PATCH net-next 09/12] net/mlx5: Register SF resource on satellite PF ports Date: Thu, 21 May 2026 14:08:40 +0300 Message-ID: <20260521110843.367329-10-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20260521110843.367329-1-tariqt@nvidia.com> References: <20260521110843.367329-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CE:EE_|MW6PR12MB8959:EE_ X-MS-Office365-Filtering-Correlation-Id: 00061c75-2307-47c6-0d65-08deb729dc86 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|7416014|36860700016|1800799024|6133799003|11063799006|22082099003|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: wgUTrl5Zy43XIGb4HqE+ocwC9ESq27+YsfGnFvoxeIFsBGbCKzXgoCPS3B5EDNzm4pX4t9GK7RHEoK/yfTgxyMyvfQZLRuU1j1WY331udxfMkxrFRxVp8brZi5JWxAp1LiPE+weCf6G47oPircLa9APtkeB6F/kbImsBQVv4qFu+Tk8YEkdlMgx7eLMW495tGV12/XA0O+xAyocx7TbJeOrdM2HCs4lGljWti7wQdJr0DXaEqIcDuE9/XeB/BUyQ/4n3QfiUK/6W4U/VpdsNqyyK297SkTmS3ciniiEvKfLPu7Q/qLq3ql9uGGzbS73cBtupXBRi4DWTSdR5/jUJSIhLXIuUczKnjFuW63gV/qm/lUN6BdGZvUBbDW6xxVt027Yd+VUeXZEI+pCzG9XrftJbBD6pnKfq2VsX4ucQ3w3RzEkflLJBN/AEx8VgIOmhimhOLkL/VQtf6/NMp4BT8OhXpwzryj72hebyogGZoixVz/9gE72fvkqyZIh/9wKanmVlFoe2ZUZrGE58D/e3iziEus/WIj486EkPKRkEEmkNNAHUqS+gy9/4fLu7AJfMfIyGd3cUW8lgwIwit0nun197FIlNDo5CLgY5F4CtJb9E+wjM4gO3GA8FDLg8Wxos0HIXPt9BJAjzKUakpIG0t3mtmflonMjCdkVZwdHQsJBLrZ8bA5iShzh5UOSdmtWXbfwj7TVuCHsjwxsXeqInDhV1BdpX+a8xUNsVro7MIv8= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(82310400026)(7416014)(36860700016)(1800799024)(6133799003)(11063799006)(22082099003)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: xuJZnwLWaXvYKDLnZYC2iN1MCVTIoSz1uWjJbWDO43JlV9t1Wmkts25k77+aivdQiqViUouZHE3t7x2a45p0Am8IP4Nk9lSS1WExEAvqNsvDC+rRcLircwlhhD5J960Ox1Y+lu3dZ1nQ0q/lc/ZKIObdTDezFn1uVZEC5YT4/8Z2ebS4oVezNvwy8Y5X1r9Gbh8zCJRo2oih/38q7DpxSV6uhOeg7zQFZnvlck0G9YAZkz6+AXPujFUdx/lDFPmgG9KKmNieDDNJhR/olurK1Pj2hZYmuNQTgBo83ihhW+a8Q0T8C2+WMrrQIdX3ifH3/WUCjrI/BC4DjlYOTKM//Al/uGwgGL/UBP9YRhZd0Jm8qOqzW1qH40x9EVEPE0KyRVXD9xXslmO06TbnOtwK90QRZYKtU20R3ObjXlMJTEslHl0/ei3adNqTsmGXfT5y X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 May 2026 11:12:35.3165 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 00061c75-2307-47c6-0d65-08deb729dc86 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CE.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8959 From: Or Har-Toov Extend port-level resource registration to satellite PF vports. Signed-off-by: Or Har-Toov Signed-off-by: Tariq Toukan --- .../mellanox/mlx5/core/esw/devlink_port.c | 31 +++++++++++++------ 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c index 05d89769b917..6e50311faa27 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c @@ -176,14 +176,28 @@ static const struct devlink_port_ops mlx5_esw_dl_sf_port_ops = { }; static int mlx5_esw_devlink_port_res_register(struct mlx5_eswitch *esw, - struct devlink_port *dl_port) + struct devlink_port *dl_port, + u16 vport_num) { struct devlink_resource_size_params size_params; struct mlx5_core_dev *dev = esw->dev; u16 max_sfs, sf_base_id; int err; - err = mlx5_esw_sf_max_hpf_functions(dev, &max_sfs, &sf_base_id); + if (vport_num != MLX5_VPORT_HOST_PF && + !mlx5_esw_is_spf_vport(esw, vport_num)) + return 0; + + if (vport_num == MLX5_VPORT_HOST_PF) { + err = mlx5_esw_sf_max_hpf_functions(dev, &max_sfs, + &sf_base_id); + } else { + int spf_idx = mlx5_esw_spf_vport_to_idx(esw, vport_num); + + err = mlx5_esw_sf_max_spf_functions(dev, spf_idx, &max_sfs, + &sf_base_id); + } + if (err) return err; @@ -232,14 +246,11 @@ int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, struct mlx if (err) goto rate_err; - if (vport_num == MLX5_VPORT_HOST_PF) { - err = mlx5_esw_devlink_port_res_register(esw, - &dl_port->dl_port); - if (err) - mlx5_core_dbg(dev, - "Failed to register port resources: %d\n", - err); - } + err = mlx5_esw_devlink_port_res_register(esw, &dl_port->dl_port, + vport_num); + if (err) + mlx5_core_dbg(dev, "Failed to register port resources: %d\n", + err); return 0; -- 2.44.0