From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D3DC3914F8; Sun, 24 May 2026 10:17:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779617842; cv=none; b=UR6Q8HtsT/FKfgTehPFkT/bCK/2wOs5iCddHHTjV3Fo09HKhZdfiTfwZvBuOMR0AEtphn/eBPgvcwSSMaj0Z95AZadzRMyGeC+HxtxOXhgE/F4ZwKS9KQQtMpcluTOwhSkCJbMv8AFLK5dDiy6ZxiziEr1YgfZMYZY1POO/6LVA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779617842; c=relaxed/simple; bh=E4G6Xwj2/EplDxdkXUOfI26BE4RMnZTwp47MKiEWClg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FN+3b71+PNBpS8aPXj09m3eAJ7dSIb84lSm0/rJ5adtBenBXqchOlWizDkHkYAbtRFOr4Fy7cGAennJoX6cBt8sf3VYrFH2UvIlFRMo37OajlReMe+TsOIEsXI0KZ35umYt9dzd0rJR5psIJnI+X+UyeHBv8IZ32RGqbo8nNQno= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=r0ig3GE3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="r0ig3GE3" Received: by smtp.kernel.org (Postfix) with ESMTPS id 58A4EC2BD01; Sun, 24 May 2026 10:17:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779617842; bh=E4G6Xwj2/EplDxdkXUOfI26BE4RMnZTwp47MKiEWClg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=r0ig3GE39Oid73J796THW7HPvtSjATzMJsaUnwtvwjMuRdzJPlU0aUYawSP+pajCg Fa0eiuQciPKYj8t6Qn2zYg6ppZzgLexvT7JJ+uYNR14bAyCE7/31q2wrCciD3qNkYd 596VoNIy4GYQIFnsQhOeuL6S5xaYfCDDOJW4bcIgrjWvZDYvNLk/Df/W3C5xFUchVY BznLsHo8ioS3cBw6PuA1xRDSWsolKDHPrAzdhYv9e069GJjENKkMI/3ZC+coC5ZJir LrQ5kfgYV8HEA1NSj7kankxdOym0hNyV8nP4n8MIt5v/aeDJm8bAQmjRh8juCZx4RJ QvGnGZc/4M+aA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5085CCD5BC7; Sun, 24 May 2026 10:17:22 +0000 (UTC) From: Rodrigo Alencar via B4 Relay Date: Sun, 24 May 2026 11:17:06 +0100 Subject: [PATCH v7 6/8] iio: dac: ad5686: add control_sync() for single-channel devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260524-ad5686-fixes-v7-6-b6bf395d08bd@analog.com> References: <20260524-ad5686-fixes-v7-0-b6bf395d08bd@analog.com> In-Reply-To: <20260524-ad5686-fixes-v7-0-b6bf395d08bd@analog.com> To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Popa , Jonathan Cameron , Greg Kroah-Hartman , Michael Auchter , Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , Andy Shevchenko , Rodrigo Alencar X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779617840; l=6723; i=rodrigo.alencar@analog.com; s=default; h=from:subject:message-id; bh=PP2UG0HfCde95ni/ZdLRopKIyB1wOm0VeNTltHqii9E=; b=x050LU9Ix1kCPPwUq6Wh/3BT/XXnc0gSu/8Nj7Buh+DRJAjQvCfG+xVABcPjQI+0NTTIYspy0 5xSkhVk7hoKDTN3UUFCpwLQw3d+9V7EfYSB/R46J5IC6IAtp7dlVYeD X-Developer-Key: i=rodrigo.alencar@analog.com; a=ed25519; pk=ULeHbgU/OYh/PG/4anHDfLgldFItQHAhOktYRVLMFRo= X-Endpoint-Received: by B4 Relay for rodrigo.alencar@analog.com/default with auth_id=561 X-Original-From: Rodrigo Alencar Reply-To: rodrigo.alencar@analog.com From: Rodrigo Alencar Create ad5310_control_sync() and ad5683_control_sync() functions that properly consume the mask definitions with FIELD_PREP(). This allows to reuse a function that updates the control register with cached values, without relying on confusing logic that depends on st->use_internal_vref, which is initialized earlier in ad5686_probe() because it is also applicable to the AD5686_REGMAP case, removing the need for the has_external_vref. Powerdown masks initialization is simplified as *_control_sync() masks outs any unused bits for the single-channel case. The change cleans up ad5686_write_dac_powerdown() and ad5686_probe(), organizing the code for feature extension, e.g. gain control support for single-channel devices. Signed-off-by: Rodrigo Alencar --- drivers/iio/dac/ad5686.c | 94 +++++++++++++++++++++++++++--------------------- drivers/iio/dac/ad5686.h | 7 ++-- 2 files changed, 59 insertions(+), 42 deletions(-) diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c index f024a7c05ddb..98a027224b05 100644 --- a/drivers/iio/dac/ad5686.c +++ b/drivers/iio/dac/ad5686.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -13,6 +14,7 @@ #include #include #include +#include #include @@ -24,6 +26,24 @@ static const char * const ad5686_powerdown_modes[] = { "three_state" }; +static int ad5310_control_sync(struct ad5686_state *st) +{ + unsigned int pd_val = st->pwr_down_mask & st->pwr_down_mode; + + return st->write(st, AD5686_CMD_CONTROL_REG, 0, + FIELD_PREP(AD5310_PD_MSK, pd_val & AD5686_PD_MSK) | + FIELD_PREP(AD5310_REF_BIT_MSK, st->use_internal_vref ? 0 : 1)); +} + +static int ad5683_control_sync(struct ad5686_state *st) +{ + unsigned int pd_val = st->pwr_down_mask & st->pwr_down_mode; + + return st->write(st, AD5686_CMD_CONTROL_REG, 0, + FIELD_PREP(AD5683_PD_MSK, pd_val & AD5686_PD_MSK) | + FIELD_PREP(AD5683_REF_BIT_MSK, st->use_internal_vref ? 0 : 1)); +} + static inline unsigned int ad5686_pd_mask_shift(const struct iio_chan_spec *chan) { if (chan->channel == chan->address) @@ -98,8 +118,8 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev, bool readin; int ret; struct ad5686_state *st = iio_priv(indio_dev); - unsigned int val, ref_bit_msk; - u8 shift, address = 0; + unsigned int val; + u8 address; ret = kstrtobool(buf, &readin); if (ret) @@ -114,32 +134,34 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev, switch (st->chip_info->regmap_type) { case AD5310_REGMAP: - shift = 9; - ref_bit_msk = AD5310_REF_BIT_MSK; + ret = ad5310_control_sync(st); + if (ret) + return ret; break; case AD5683_REGMAP: - shift = 13; - ref_bit_msk = AD5683_REF_BIT_MSK; + ret = ad5683_control_sync(st); + if (ret) + return ret; break; case AD5686_REGMAP: - shift = 0; - ref_bit_msk = 0; /* AD5674R/AD5679R have 16 channels and 2 powerdown registers */ - if (chan->channel > 0x7) + val = st->pwr_down_mask & st->pwr_down_mode; + if (chan->channel > 0x7) { address = 0x8; + val = upper_16_bits(val); + } else { + address = 0x0; + val = lower_16_bits(val); + } + ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, address, val); + if (ret) + return ret; break; default: return -EINVAL; } - val = ((st->pwr_down_mask & st->pwr_down_mode) << shift); - if (!st->use_internal_vref) - val |= ref_bit_msk; - - ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, - address, val >> (address * 2)); - - return ret ? ret : len; + return len; } static int ad5686_read_raw(struct iio_dev *indio_dev, @@ -453,9 +475,6 @@ int ad5686_probe(struct device *dev, { struct ad5686_state *st; struct iio_dev *indio_dev; - unsigned int val, ref_bit_msk, shift; - bool has_external_vref; - u8 cmd; int ret, i; indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); @@ -473,13 +492,12 @@ int ad5686_probe(struct device *dev, if (ret < 0 && ret != -ENODEV) return ret; - has_external_vref = ret != -ENODEV; - st->vref_mv = has_external_vref ? ret / 1000 : st->chip_info->int_vref_mv; + st->use_internal_vref = ret == -ENODEV; + st->vref_mv = st->use_internal_vref ? st->chip_info->int_vref_mv : ret / 1000; - /* Initialize masks to all ones provided the max shift (last channel) */ - shift = ad5686_pd_mask_shift(&st->chip_info->channels[st->chip_info->num_channels - 1]); - st->pwr_down_mask = GENMASK(shift + 1, 0); - st->pwr_down_mode = GENMASK(shift + 1, 0); + /* Initialize masks to all ones */ + st->pwr_down_mask = ~0; + st->pwr_down_mode = ~0; /* Set all the power down mode for all channels to 1K pulldown */ for (i = 0; i < st->chip_info->num_channels; i++) { @@ -499,29 +517,25 @@ int ad5686_probe(struct device *dev, switch (st->chip_info->regmap_type) { case AD5310_REGMAP: - cmd = AD5686_CMD_CONTROL_REG; - ref_bit_msk = AD5310_REF_BIT_MSK; - st->use_internal_vref = !has_external_vref; + ret = ad5310_control_sync(st); + if (ret) + return ret; break; case AD5683_REGMAP: - cmd = AD5686_CMD_CONTROL_REG; - ref_bit_msk = AD5683_REF_BIT_MSK; - st->use_internal_vref = !has_external_vref; + ret = ad5683_control_sync(st); + if (ret) + return ret; break; case AD5686_REGMAP: - cmd = AD5686_CMD_INTERNAL_REFER_SETUP; - ref_bit_msk = AD5686_REF_BIT_MSK; + ret = st->write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0, + st->use_internal_vref ? 0 : AD5686_REF_BIT_MSK); + if (ret) + return ret; break; default: return -EINVAL; } - val = has_external_vref ? ref_bit_msk : 0; - - ret = st->write(st, cmd, 0, val); - if (ret) - return ret; - return devm_iio_device_register(dev, indio_dev); } EXPORT_SYMBOL_NS_GPL(ad5686_probe, "IIO_AD5686"); diff --git a/drivers/iio/dac/ad5686.h b/drivers/iio/dac/ad5686.h index 176d41966985..17980c54839c 100644 --- a/drivers/iio/dac/ad5686.h +++ b/drivers/iio/dac/ad5686.h @@ -39,9 +39,12 @@ #define AD5686_CMD_READBACK_ENABLE_V2 0x5 #define AD5310_REF_BIT_MSK BIT(8) -#define AD5683_REF_BIT_MSK BIT(12) -#define AD5686_REF_BIT_MSK BIT(0) +#define AD5310_PD_MSK GENMASK(10, 9) +#define AD5683_REF_BIT_MSK BIT(12) +#define AD5683_PD_MSK GENMASK(14, 13) + +#define AD5686_REF_BIT_MSK BIT(0) #define AD5686_PD_MSK GENMASK(1, 0) #define AD5686_PD_MODE_1K_TO_GND 0x1 -- 2.43.0