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Sun, 24 May 2026 08:38:57 -0700 From: Edward Srouji Date: Sun, 24 May 2026 18:38:07 +0300 Subject: [PATCH rdma-next 6/8] RDMA/bnxt_re: Validate rate limit attribute in modify QP Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20260524-packet-pacing-v1-6-3d79439f8d08@nvidia.com> References: <20260524-packet-pacing-v1-0-3d79439f8d08@nvidia.com> In-Reply-To: <20260524-packet-pacing-v1-0-3d79439f8d08@nvidia.com> To: Leon Romanovsky , Saeed Mahameed , Tariq Toukan , Mark Bloch , "Jason Gunthorpe" , Selvin Xavier , "Kalesh AP" , Abhijit Gangurde , Allen Hubbe CC: , , , Edward Srouji , "Maher Sanalla" , Michael Guralnik X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779637112; l=2424; i=edwards@nvidia.com; s=20251029; h=from:subject:message-id; bh=fq7MowR9CX9tImXf6Si2fqSZrv2vAQr07noXS/Nj7Nk=; b=kLjYTQNhH7Miy8rYzHt7WbZH/g6e4F8c876GSk24yF5Lvy1YtY+QxM1lhnF3CO9UD4X4MDIv9 mmd6FhwDrYlCpuG7t3F4H6eHIDTbpiga4XgjhJkrfmjevbJHOvyI3WU X-Developer-Key: i=edwards@nvidia.com; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: knYRznc4CPaxhDMkc3v1Y12eif1TbKE2UPkxYMqIP61xlrggAcU6JvZ5wdLJmAENVaaSsbrk5Or6tuZw3eeM58jwR+sjnS8Bbf+a6P6Pyvo6HYEbVHrhsOQ6xK91vCZScAyYLDSNhYwR6JI10BaG+UEBWPZCqB9jhYohG8UiojxclXCAA01RuqBXapvf2+uL+LgqyJSmX9ZLRCrRNES+TwerApXKXnpwu4eNYloP4z7NmVsVszUq+PKDI3K8IEWdca7n4SETpjj8UY70KAs0jss2TZrlH5p8ZyJMZF8Aq447Fb1AKX6UOef441T15nYPWDwrZkfWz2vH9IJ/e0rW5Mh+1WONucjh4eHyoG7xBHftex/cmwnRNvAwucc20VmArPb4QgOCAFJ6WqdeFlGzJvEWMpcYSQ4SqpnBElOqw0iTjOlBcANccIh+M8BbF/3w X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2026 15:39:09.4883 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: db50caa8-47af-486f-ccf2-08deb9aa9904 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6927 From: Maher Sanalla Rate limit transition validation for RC QPs currently relies on the IB core qp_state_table. Add a driver-level helper to validate the rate limit attribute directly during QP modify, ensuring it is only accepted for RC QPs in INIT->RTR, RTR->RTS and RTS->RTS transitions. This makes the driver responsible for rate limit validation and prepares for a follow-up IB core change that delegates IB_QP_RATE_LIMIT and all future non-standard modify attributes handling to individual vendor drivers. Signed-off-by: Maher Sanalla Reviewed-by: Michael Guralnik Signed-off-by: Edward Srouji --- drivers/infiniband/hw/bnxt_re/ib_verbs.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/infiniband/hw/bnxt_re/ib_verbs.c b/drivers/infiniband/hw/bnxt_re/ib_verbs.c index ccb362d6d2e669160174cc562d4e3d8d22b110db..14d2533d7439f2c160ceeea3d0c1e2fe9abcd9f5 100644 --- a/drivers/infiniband/hw/bnxt_re/ib_verbs.c +++ b/drivers/infiniband/hw/bnxt_re/ib_verbs.c @@ -2286,6 +2286,23 @@ static int bnxt_re_modify_shadow_qp(struct bnxt_re_dev *rdev, return rc; } +static bool bnxt_re_is_modify_ok(enum ib_qp_attr_mask ext_mask, + enum ib_qp_type type, enum ib_qp_state cur, + enum ib_qp_state next) +{ + if (!ext_mask) + return true; + + if (ext_mask & ~IB_QP_RATE_LIMIT) + return false; + + /* Rate limit is only supported for RC QPs during specific transitions */ + return type == IB_QPT_RC && + ((cur == IB_QPS_INIT && next == IB_QPS_RTR) || + (cur == IB_QPS_RTR && next == IB_QPS_RTS) || + (cur == IB_QPS_RTS && next == IB_QPS_RTS)); +} + int bnxt_re_modify_qp(struct ib_qp *ib_qp, struct ib_qp_attr *qp_attr, int qp_attr_mask, struct ib_udata *udata) { @@ -2310,7 +2327,10 @@ int bnxt_re_modify_qp(struct ib_qp *ib_qp, struct ib_qp_attr *qp_attr, curr_qp_state = __to_ib_qp_state(qp->qplib_qp.cur_qp_state); new_qp_state = qp_attr->qp_state; if (!ib_modify_qp_is_ok(curr_qp_state, new_qp_state, - ib_qp->qp_type, qp_attr_mask)) { + ib_qp->qp_type, qp_attr_mask) || + !bnxt_re_is_modify_ok(qp_attr_mask & ~IB_QP_ATTR_STANDARD_BITS, + ib_qp->qp_type, curr_qp_state, + new_qp_state)) { ibdev_err(&rdev->ibdev, "Invalid attribute mask: %#x specified ", qp_attr_mask); -- 2.49.0