From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C5C23D7A15; Tue, 26 May 2026 09:39:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779788365; cv=none; b=h7yJ+kH7Q09J0dOskdiD4w89Q1lOMvVIr+LYqWX69MVXh31yh55Z0lg0eQ1Qh04iAylFX+NUtaANXvOjxkyJ64gOMM6PU7moHgwppeJVYGM8obPpNW21yJD3tnCib/OgoPs5VI1uUa83kDNv3rkGPzFVHfoKFL0GqQ08aS/ptsY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779788365; c=relaxed/simple; bh=Iag459w5Q1V/cp3vvGlrSGcOoddGI9HE38qIjqc2esE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fQNPkoVm/jsQum8E/tzlnjocXRlxcBhDz1H3xgAnJnRceE4YDVJTgpkzfaRZtz24P/LumWipJQdiZ+qefLvxcbYEGE71QqSVsbVjbAYjp2rXLzgtKWhWxO2GyYekT7bIe5veJope6q7HsdoO1cgP74DT41+7BdmoaPCCddzoqQE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hqNZe7mz; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hqNZe7mz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1779788364; x=1811324364; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Iag459w5Q1V/cp3vvGlrSGcOoddGI9HE38qIjqc2esE=; b=hqNZe7mzhS2HIR2Xi7Grcp5wqDhR/D6cs8x++9UQxn7de3PgOJIlfcWH a/DC2kHV+quBnaAmzJv+z7xHi2AbQteIHrpW6T+fKy2NFbbljkR012MUk 3yX29ECeC0urf9OPlYUxJRApvrsfcCdzbEPDengU/iprqNa6aSUni7FYh 3rmx2a/2Zwd3w+jEjH9bq7d4kn9okcT0E5genR4EtwyV9+syAg07M85po V05CXkYJJvbTLqoj8Cyus8BwP4Ia/GQBnL8PrNApVgeMlPl4jT0ZNq5Hh cKYJ46lNPcWKWVVCsfJWk05+3tw2Aib4op3NQu3Dt6sx5yTTHq3mHwGMF A==; X-CSE-ConnectionGUID: 1FXvfBnvRAawdaujaXKkug== X-CSE-MsgGUID: E/OyD6qRQTywpApezG4sKA== X-IronPort-AV: E=McAfee;i="6800,10657,11797"; a="90897202" X-IronPort-AV: E=Sophos;i="6.24,169,1774335600"; d="scan'208";a="90897202" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2026 02:39:23 -0700 X-CSE-ConnectionGUID: afLlH073RKiDrgpsSbj/4A== X-CSE-MsgGUID: dBqnQmpGQLKNvX+jNnwBnA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,169,1774335600"; d="scan'208";a="241027261" Received: from gklab-003-001.igk.intel.com ([10.91.173.48]) by orviesa010.jf.intel.com with ESMTP; 26 May 2026 02:39:17 -0700 From: Grzegorz Nitka To: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, poros@redhat.com, richardcochran@gmail.com, andrew+netdev@lunn.ch, przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com, Prathosh.Satish@microchip.com, ivecera@redhat.com, jiri@resnulli.us, arkadiusz.kubalewski@intel.com, vadim.fedorenko@linux.dev, donald.hunter@gmail.com, horms@kernel.org, pabeni@redhat.com, kuba@kernel.org, davem@davemloft.net, edumazet@google.com, Grzegorz Nitka , Jiri Pirko , Aleksandr Loktionov Subject: [PATCH v11 net-next 2/8] dpll: allow registering FW-identified pin with a different DPLL Date: Tue, 26 May 2026 11:34:13 +0200 Message-Id: <20260526093419.639220-3-grzegorz.nitka@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260526093419.639220-1-grzegorz.nitka@intel.com> References: <20260526093419.639220-1-grzegorz.nitka@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Relax the (module, clock_id) equality requirement when registering a pin identified by firmware (pin->fwnode). Some platforms associate a FW-described pin with a DPLL instance that differs from the pin's (module, clock_id) tuple. For such pins, permit registration without requiring the strict match. Non-FW pins still require equality. Keep netlink pin module reporting/filtering safe for this relaxed registration model by caching the module name in the pin object at allocation time and using the cached string in netlink paths. This avoids dereferencing pin->module after provider module teardown. Reviewed-by: Jiri Pirko Reviewed-by: Arkadiusz Kubalewski Reviewed-by: Aleksandr Loktionov Signed-off-by: Grzegorz Nitka --- drivers/dpll/dpll_core.c | 20 ++++++++++++++++---- drivers/dpll/dpll_core.h | 2 ++ drivers/dpll/dpll_netlink.c | 6 +++--- 3 files changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c index 20a54728549c..6dc7e93ece75 100644 --- a/drivers/dpll/dpll_core.c +++ b/drivers/dpll/dpll_core.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -652,6 +653,7 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, pin->pin_idx = pin_idx; pin->clock_id = clock_id; pin->module = module; + strscpy(pin->module_name, module_name(module)); if (WARN_ON(prop->type < DPLL_PIN_TYPE_MUX || prop->type > DPLL_PIN_TYPE_MAX)) { ret = -EINVAL; @@ -884,11 +886,21 @@ dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, return -EINVAL; mutex_lock(&dpll_lock); - if (WARN_ON(!(dpll->module == pin->module && - dpll->clock_id == pin->clock_id))) + + /* + * For pins identified via firmware (pin->fwnode), allow registration + * even if the pin's (module, clock_id) differs from the target DPLL. + * For non-fwnode pins, require a strict (module, clock_id) match. + */ + if (!pin->fwnode && + WARN_ON_ONCE(dpll->module != pin->module || + dpll->clock_id != pin->clock_id)) { ret = -EINVAL; - else - ret = __dpll_pin_register(dpll, pin, ops, priv, NULL); + goto out_unlock; + } + + ret = __dpll_pin_register(dpll, pin, ops, priv, NULL); +out_unlock: mutex_unlock(&dpll_lock); return ret; diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h index 71ac88ef2017..26d1537ada82 100644 --- a/drivers/dpll/dpll_core.h +++ b/drivers/dpll/dpll_core.h @@ -45,6 +45,7 @@ struct dpll_device { * @pin_idx: index of a pin given by dev driver * @clock_id: clock_id of creator * @module: module of creator + * @module_name: module name of creator * @fwnode: optional reference to firmware node * @dpll_refs: hold referencees to dplls pin was registered with * @parent_refs: hold references to parent pins pin was registered with @@ -59,6 +60,7 @@ struct dpll_pin { u32 pin_idx; u64 clock_id; struct module *module; + char module_name[MODULE_NAME_LEN]; struct fwnode_handle *fwnode; struct xarray dpll_refs; struct xarray parent_refs; diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index 095ef8703c0b..274d453931ba 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -703,7 +703,7 @@ dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, if (ret) return ret; if (nla_put_string(msg, DPLL_A_PIN_MODULE_NAME, - module_name(pin->module))) + pin->module_name)) return -EMSGSIZE; if (nla_put_64bit(msg, DPLL_A_PIN_CLOCK_ID, sizeof(pin->clock_id), &pin->clock_id, DPLL_A_PIN_PAD)) @@ -1641,9 +1641,9 @@ dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, xa_for_each_marked(&dpll_pin_xa, i, pin, DPLL_REGISTERED) { prop = &pin->prop; cid_match = clock_id ? pin->clock_id == clock_id : true; - mod_match = mod_name_attr && module_name(pin->module) ? + mod_match = mod_name_attr && pin->module_name[0] ? !nla_strcmp(mod_name_attr, - module_name(pin->module)) : true; + pin->module_name) : true; type_match = type ? prop->type == type : true; board_match = board_label ? (prop->board_label ? !nla_strcmp(board_label, prop->board_label) : false) : -- 2.39.3