From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC6763D6CC5; Tue, 26 May 2026 09:39:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779788380; cv=none; b=ls7br1k70wU147dRU05+wK6hGTtfHJ/lIiFCUJXWmJd8/Omp2cUn5o/j1NhYOuhWplQ5Rs67R/fWX6BAb8zBKViMFPgY6PEeY+B6H17698ByqYE17z8bLIyzUbY+r9Ed9kIRAnl5dFl6sd/2Anr9ppAlvMjM4asVRwp1NfxPvt8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779788380; c=relaxed/simple; bh=f4CVBYvBZXYPMriPrpN7kde+f4AJB2joLIhMcwxsOdU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=u81Vq5isajrXgihpL1Nygtt9nxJiYSvD3tcTsPlVVnVPUAx8mL5AlbKXqkS5ibZmptH2RVr7S2OlDnONb3ZT7I/du7y4tZ6PAD6Fx3JmoaMAYSfFmC2tE5/38cxKoohm48/h2cc3P8lpXl5DHWWeGrwL1zQ1pvCdrMEm7MkOuZk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=AZhXPXzc; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="AZhXPXzc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1779788378; x=1811324378; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=f4CVBYvBZXYPMriPrpN7kde+f4AJB2joLIhMcwxsOdU=; b=AZhXPXzcEidnY7pzTNx9q9aUrh1FPxGd8Bz1gWsWhDbdOB20Fj1qJH83 kW+wqulBZaK0T47a5MJwWsb4E19uEyczD1JnhWSx0bmAzFZ4eu3coJKH8 CbFl/mumH3HIPu0CVIKHPHFv53NQDQ/oGlAfxYdRPrETDyl74mSe6Cn8l XCBUfzQVKr0S5jV9zyfmGBc8aFVW1nD1jods1YyqYNx05/M78bGzzuZYF ewEBAqVNdqDMw5gKCsDPLbHKTlaHeFEYSdbU4dBJpDpNV9PBcGo4JfAlu HiW2SH/KlaMcIxBHp1moj2tUFxj/Da/7ahRuMi1mxtCziFutbq9QPoi10 Q==; X-CSE-ConnectionGUID: 43TsFgWXSwuPB1VPO5BiXw== X-CSE-MsgGUID: FdVS2oQCQc+1izzbD4B0JA== X-IronPort-AV: E=McAfee;i="6800,10657,11797"; a="90897260" X-IronPort-AV: E=Sophos;i="6.24,169,1774335600"; d="scan'208";a="90897260" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2026 02:39:38 -0700 X-CSE-ConnectionGUID: D0EnGxW4T7WD2qnfEWI6lQ== X-CSE-MsgGUID: 3hmPycacQFKthEakuI0wqg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,169,1774335600"; d="scan'208";a="241027295" Received: from gklab-003-001.igk.intel.com ([10.91.173.48]) by orviesa010.jf.intel.com with ESMTP; 26 May 2026 02:39:30 -0700 From: Grzegorz Nitka To: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, poros@redhat.com, richardcochran@gmail.com, andrew+netdev@lunn.ch, przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com, Prathosh.Satish@microchip.com, ivecera@redhat.com, jiri@resnulli.us, arkadiusz.kubalewski@intel.com, vadim.fedorenko@linux.dev, donald.hunter@gmail.com, horms@kernel.org, pabeni@redhat.com, kuba@kernel.org, davem@davemloft.net, edumazet@google.com, Grzegorz Nitka , Aleksandr Loktionov Subject: [PATCH v11 net-next 4/8] dpll: allow fwnode pins to attempt state change without capability bit Date: Tue, 26 May 2026 11:34:15 +0200 Message-Id: <20260526093419.639220-5-grzegorz.nitka@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260526093419.639220-1-grzegorz.nitka@intel.com> References: <20260526093419.639220-1-grzegorz.nitka@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Pins registered with an fwnode may have .state_on_dpll_set implemented without advertising DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE upfront. Requiring the bit for fwnode pins ties firmware description to driver implementation details unnecessarily. Relax the capability check in dpll_pin_state_set() and dpll_pin_on_pin_state_set(): when a pin has an associated fwnode, bypass the capability gate and let the ops layer decide, returning -EOPNOTSUPP if .state_on_dpll_set is absent. Non-fwnode pins retain the original strict behavior. This is used later in the series by the SyncE_Ref output pin, which relies on the fwnode path for state control. Reviewed-by: Aleksandr Loktionov Signed-off-by: Grzegorz Nitka --- drivers/dpll/dpll_netlink.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index f81ed1071dba..162c2a8cffca 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -1316,8 +1316,11 @@ dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, unsigned long i; int ret; + /* fwnode pins may not set the capability bit upfront; let the ops + * layer return -EOPNOTSUPP if the operation is unsupported. + */ if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & - pin->prop.capabilities)) { + pin->prop.capabilities) && !pin->fwnode) { NL_SET_ERR_MSG(extack, "state changing is not allowed"); return -EOPNOTSUPP; } @@ -1352,8 +1355,11 @@ dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, struct dpll_pin_ref *ref; int ret; + /* fwnode pins may not set the capability bit upfront; let the ops + * layer return -EOPNOTSUPP if the operation is unsupported. + */ if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & - pin->prop.capabilities)) { + pin->prop.capabilities) && !pin->fwnode) { NL_SET_ERR_MSG(extack, "state changing is not allowed"); return -EOPNOTSUPP; } -- 2.39.3