From: fangyu.yu@linux.alibaba.com
To: Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Nick Kossifidis <mick@ics.forth.gr>
Cc: "Song Shuai" <songshuaishuai@tinylab.org>,
"Björn Töpel" <bjorn@rivosinc.com>,
"Ard Biesheuvel" <ardb@kernel.org>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Arnd Bergmann" <arnd@arndb.de>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Richard Lyu" <richard.lyu@suse.com>,
"Nam Cao" <namcao@linutronix.de>,
"Jisheng Zhang" <jszhang@kernel.org>,
"Nathan Chancellor" <nathan@kernel.org>,
guoren@kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, kexec@lists.infradead.org,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
"Fangyu Yu" <fangyu.yu@linux.alibaba.com>
Subject: [PATCH v2 4/7] riscv: kexec: Switch to trampoline page table before norelocate
Date: Tue, 26 May 2026 20:50:06 +0800 [thread overview]
Message-ID: <20260526125009.2404-5-fangyu.yu@linux.alibaba.com> (raw)
In-Reply-To: <20260526125009.2404-1-fangyu.yu@linux.alibaba.com>
From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Make riscv_kexec_norelocate a two-pass trampoline so it can
drop the kernel page tables while still executing from a
mapped address.
On the first entry, t3 is initialized to 0 by machine_kexec().
Loads the physical address of riscv_kexec_norelocate and the
trampoline SATP value, switches to the trampoline page table,
and jumps to the trampoline VA(=PA).
On the second entry, t3 contains the physical address of
riscv_kexec_norelocate, so the PC comparison matches and
execution continues under trampoline VA(=PA).
Since the trampoline page table is already active, replace the
previous stvec-based handoff with a direct jump to the target
entry (jr a2).
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
---
arch/riscv/kernel/kexec_relocate.S | 32 ++++++++++++++++++----
arch/riscv/kernel/machine_kexec.c | 44 +++++++++++++++++++++++++++---
2 files changed, 67 insertions(+), 9 deletions(-)
diff --git a/arch/riscv/kernel/kexec_relocate.S b/arch/riscv/kernel/kexec_relocate.S
index af6b99f5b0fd..2b9892bf04f2 100644
--- a/arch/riscv/kernel/kexec_relocate.S
+++ b/arch/riscv/kernel/kexec_relocate.S
@@ -147,13 +147,35 @@ riscv_kexec_relocate_end:
/* Used for jumping to crashkernel */
+.extern kexec_tramp_satp
+.extern riscv_kexec_norelocate_pa
.section ".kexec.tramp.text", "ax"
SYM_CODE_START(riscv_kexec_norelocate)
+ /*
+ * Two-pass entry:
+ * - 1st entry: t3 == 0 (initialized by machine_kexec()).
+ *
+ * - 2nd entry: t3 holds the physical address of
+ * riscv_kexec_norelocate, so auipc matches t3 and we fall through
+ * to label 1 to continue execution under trampoline VA(=PA).
+ */
+ auipc t0, 0
+ beq t0, t3, 1f
+
+ la t0, riscv_kexec_norelocate_pa
+ REG_L t3, 0(t0)
+ la t0, kexec_tramp_satp
+ REG_L t1, 0(t0)
+ csrw CSR_SATP, t1
+ sfence.vma x0, x0
+
+ jr t3
/*
* s0: (const) Phys address to jump to
* s1: (const) Phys address of the FDT image
* s2: (const) The hartid of the current hart
*/
+1:
mv s0, a1
mv s1, a2
mv s2, a3
@@ -199,13 +221,13 @@ SYM_CODE_START(riscv_kexec_norelocate)
csrw CSR_SSCRATCH, zero
/*
- * Switch to physical addressing
- * This will also trigger a jump to CSR_STVEC
- * which in this case is the address of the new
- * kernel.
+ * We are already executing from the trampoline VA with the trampoline
+ * page table installed, so there is no need to rely on the old flow
+ * of programming stvec and taking the implicit trap on SATP switch.
+ * Jump directly to the target entry instead.
*/
- csrw CSR_STVEC, a2
csrw CSR_SATP, zero
+ jr a2
SYM_CODE_END(riscv_kexec_norelocate)
diff --git a/arch/riscv/kernel/machine_kexec.c b/arch/riscv/kernel/machine_kexec.c
index 9b4b495e7c15..00fdc42d650d 100644
--- a/arch/riscv/kernel/machine_kexec.c
+++ b/arch/riscv/kernel/machine_kexec.c
@@ -18,6 +18,8 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
+unsigned long kexec_tramp_satp;
+unsigned long riscv_kexec_norelocate_pa;
static pgd_t kexec_tramp_pgd[PTRS_PER_PGD] __aligned(PAGE_SIZE);
static p4d_t kexec_tramp_p4d[PTRS_PER_P4D] __aligned(PAGE_SIZE);
static pud_t kexec_tramp_pud[PTRS_PER_PUD] __aligned(PAGE_SIZE);
@@ -135,11 +137,17 @@ machine_kexec_prepare(struct kimage *image)
} else {
/*
* Crash kexec uses riscv_kexec_norelocate as a trampoline.
- * Pre-build the trampoline page tables here so the panic
- * path only has to switch satp and jump.
+ * Pre-build the trampoline page tables and capture the
+ * trampoline SATP value plus the physical address of
+ * riscv_kexec_norelocate so that the panic path only has
+ * to switch satp and jump.
*/
riscv_kexec_build_tramp((unsigned long)__kexec_tramp_text_start,
__pa_symbol(__kexec_tramp_text_start));
+ WRITE_ONCE(riscv_kexec_norelocate_pa,
+ __pa_symbol(&riscv_kexec_norelocate));
+ WRITE_ONCE(kexec_tramp_satp,
+ PFN_DOWN(__pa_symbol(kexec_tramp_pgd)) | satp_mode);
}
return 0;
@@ -243,7 +251,35 @@ machine_kexec(struct kimage *image)
/* Jump to the relocation code */
pr_notice("Bye...\n");
- kexec_method(first_ind_entry, jump_addr, fdt_addr,
- this_hart_id, kernel_map.va_pa_offset);
+ /*
+ * Hand off to the trampoline. For KEXEC_TYPE_CRASH we go into
+ * riscv_kexec_norelocate, which uses t3 as the 1st/2nd-pass
+ * discriminator (must be 0 on first entry). A bare
+ * asm volatile ("li t3, 0" ::: "t3")
+ * before the C call only declares t3 *modified*; the compiler is
+ * free to use t3 as scratch when materialising args. Pin t3 = 0
+ * (and the args) via local register variables and perform the
+ * indirect jump inside the same inline asm so t3 == 0 is
+ * guaranteed at the moment control leaves machine_kexec().
+ */
+ {
+ register unsigned long a0_val asm("a0") = first_ind_entry;
+ register unsigned long a1_val asm("a1") = jump_addr;
+ register unsigned long a2_val asm("a2") = fdt_addr;
+ register unsigned long a3_val asm("a3") = this_hart_id;
+ register unsigned long a4_val asm("a4") = kernel_map.va_pa_offset;
+ register unsigned long t3_zero asm("t3") = 0;
+ register riscv_kexec_method m asm("t6") = kexec_method;
+
+ asm volatile (
+ "jr %[m]"
+ :
+ : "r" (a0_val), "r" (a1_val), "r" (a2_val),
+ "r" (a3_val), "r" (a4_val),
+ "r" (t3_zero),
+ [m] "r" (m)
+ : "memory"
+ );
+ }
unreachable();
}
--
2.50.1
next prev parent reply other threads:[~2026-05-26 12:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 12:50 [PATCH v2 0/7] riscv: kexec: Fix VCPU crash on kexec/kdump under KVM fangyu.yu
2026-05-26 12:50 ` [PATCH v2 1/7] riscv: Add kexec trampoline text section to vmlinux.lds.S fangyu.yu
2026-05-26 12:50 ` [PATCH v2 2/7] riscv: kexec: Place norelocate trampoline into .kexec.tramp.text fangyu.yu
2026-05-26 12:50 ` [PATCH v2 3/7] riscv: kexec: Build trampoline page tables for crash kernel entry fangyu.yu
2026-05-26 12:50 ` fangyu.yu [this message]
2026-05-26 12:50 ` [PATCH v2 5/7] riscv: kexec: Always build the trampoline page table fangyu.yu
2026-05-26 12:50 ` [PATCH v2 6/7] riscv: kexec: Add the relocate-trampoline wrapper fangyu.yu
2026-05-26 12:50 ` [PATCH v2 7/7] riscv: kexec: Route normal kexec through the trampoline page table fangyu.yu
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