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Tue, 26 May 2026 07:54:09 -0700 (PDT) Received: from localhost ([2601:1c0:5000:d5c:4ec8:83f5:8254:6891]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8419a140893sm6498627b3a.46.2026.05.26.07.54.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2026 07:54:08 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Akhil P Oommen , Rob Clark , Dmitry Baryshkov , Anna Maniscalco , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v10 06/16] drm/msm: Add a6xx+ perfcntr tables Date: Tue, 26 May 2026 07:50:40 -0700 Message-ID: <20260526145137.160554-7-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260526145137.160554-1-robin.clark@oss.qualcomm.com> References: <20260526145137.160554-1-robin.clark@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: tg-dhRIevnQQwyqF8Ez3Jy9rDmxlRdCd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI2MDEyNyBTYWx0ZWRfX/5A0t+m1MdVB EW/vgG2OMqk2JthI/cLBA0TsD5BVnDT5IANnuG+BLgJ8PGIAzBe7V4uvrFzlkKM82PmvGUPQwVk LWMVsiJA6OFJ9x1rzqQUhsDcYuEqnst1V5qitel6x61qK8wY3FWodMw7SowW1nLL0v1Gy6JZArI 5wK0m4gDsmYBxZWgjQ6W0+CPQ70jFaoaYc/qm62gwf2QTGiInCW5U9gXSvEWEH/zeMVQEWRTw/9 aNgtivF4P1eT4IERwZJOfahfmQ0N+/xruIJgLixBRudqMcNOLrKMH3s1Y3DjrLGQYJgx5531iYD 5Ww3kD8/fIehH1eFh1K4pNuyI7U4p6yPA+J2BlYu5UtrnUv1E5TRDgBEpDV5zBzgYKT0RnAL26L A9HXLnW2FE8V7HFvp8rDseGruRt5RJa/nPkVC10eeBLC6/0kfIn5wxXHI2ETDKbKk+5hfr3YIZk V0zu31sI+J/k0rNF6xg== X-Authority-Analysis: v=2.4 cv=VPHtWdPX c=1 sm=1 tr=0 ts=6a15b412 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=xqWC_Br6kY4A:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=pGLkceISAAAA:8 a=tmZHKQuSfWdd6biKE2QA:9 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-ORIG-GUID: tg-dhRIevnQQwyqF8Ez3Jy9rDmxlRdCd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-26_03,2026-05-26_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 priorityscore=1501 bulkscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605260127 Wire up the generated perfcntr tables for a6xx+. The PERFCNTR_CONFIG ioctl will use this information to assign counters. Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov Reviewed-by: Anna Maniscalco Reviewed-by: Akhil P Oommen --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 15 +++++++++++++++ drivers/gpu/drm/msm/msm_gpu.h | 4 ++++ drivers/gpu/drm/msm/msm_perfcntr.h | 9 +++++++++ 3 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index e578417a4949..727281fbef36 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -5,6 +5,7 @@ #include "msm_gem.h" #include "msm_mmu.h" #include "msm_gpu_trace.h" +#include "msm_perfcntr.h" #include "a6xx_gpu.h" #include "a6xx_gmu.xml.h" @@ -2637,6 +2638,20 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) adreno_gpu = &a6xx_gpu->base; gpu = &adreno_gpu->base; + if ((ADRENO_6XX_GEN1 <= config->info->family) && + (config->info->family <= ADRENO_6XX_GEN4)) { + gpu->perfcntr_groups = a6xx_perfcntr_groups; + gpu->num_perfcntr_groups = a6xx_num_perfcntr_groups; + } else if ((ADRENO_7XX_GEN1 <= config->info->family) && + (config->info->family <= ADRENO_7XX_GEN3)) { + gpu->perfcntr_groups = a7xx_perfcntr_groups; + gpu->num_perfcntr_groups = a7xx_num_perfcntr_groups; + } else if ((ADRENO_8XX_GEN1 <= config->info->family) && + (config->info->family <= ADRENO_8XX_GEN2)) { + gpu->perfcntr_groups = a8xx_perfcntr_groups; + gpu->num_perfcntr_groups = a8xx_num_perfcntr_groups; + } + mutex_init(&a6xx_gpu->gmu.lock); spin_lock_init(&a6xx_gpu->aperture_lock); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 78e1478669be..8c08dc065372 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -24,6 +24,7 @@ struct msm_gem_submit; struct msm_gem_vm_log_entry; struct msm_gpu_state; struct msm_context; +struct msm_perfcntr_group; struct msm_gpu_config { const char *ioname; @@ -262,6 +263,9 @@ struct msm_gpu { bool allow_relocs; struct thermal_cooling_device *cooling; + + const struct msm_perfcntr_group *perfcntr_groups; + unsigned num_perfcntr_groups; }; static inline struct msm_gpu *dev_to_gpu(struct device *dev) diff --git a/drivers/gpu/drm/msm/msm_perfcntr.h b/drivers/gpu/drm/msm/msm_perfcntr.h index 75300bd69e80..8b0d627b2779 100644 --- a/drivers/gpu/drm/msm/msm_perfcntr.h +++ b/drivers/gpu/drm/msm/msm_perfcntr.h @@ -35,6 +35,15 @@ struct msm_perfcntr_group { const struct msm_perfcntr_counter *counters; }; +extern const struct msm_perfcntr_group a6xx_perfcntr_groups[]; +extern const unsigned a6xx_num_perfcntr_groups; + +extern const struct msm_perfcntr_group a7xx_perfcntr_groups[]; +extern const unsigned a7xx_num_perfcntr_groups; + +extern const struct msm_perfcntr_group a8xx_perfcntr_groups[]; +extern const unsigned a8xx_num_perfcntr_groups; + #define GROUP(_name, _pipe, _counters, _countables) { \ .name = _name, \ .pipe = _pipe, \ -- 2.54.0