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Wed, 27 May 2026 02:54:31 -0700 (PDT) Received: from hu-mojha-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-841d70f17cbsm1809325b3a.45.2026.05.27.02.54.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 02:54:30 -0700 (PDT) From: Mukesh Ojha To: Thomas Gleixner Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Mukesh Ojha Subject: [PATCH v2 0/4] irqchip/qcom-pdc: Misc. changes Date: Wed, 27 May 2026 15:24:22 +0530 Message-ID: <20260527095426.2324504-1-mukesh.ojha@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: 7YhkJSKlOzEtG9gPE6KrYJ8aplpg6MRK X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI3MDA5NSBTYWx0ZWRfX3lPFlHbD8EIp NBNvPfiKwCy4dluLuntDyMsO1lyYsGlbaCrlwq9Ko6AJN4SZkKrJasPiVBycFtHFIIp81Wq+cpI kepbOwlwxtkrYIzq3aUGb567fFANC66+8HIKVw5eKFGhsRM6fj9D0Fh06S6hHyLITHqAYUMPg80 Bl9y6vFZh82NQgHESGt6dFonpTOqSqsNkDRh3HyYm3xtYCPGZZpB9X5vsg9B0Uy9Hn7bs+y1opT KCzlaqLxGYsw5Ghe762aT4KRfcr5dv3RlA2R00uheWxFkngEkogBVoCFN0tNIG1701bAaul7yQu kBn/Dc/jGJZhO36SpG5iw7/giVqIzviI5gGS/lzNTFhlyIpG2nzpj12b5OQb9OOabklpj0/MsPG GDxuZToPJ8x/zgxMmXao4Zofq4x86v3hcV4wsqzcEp60bPYFVz9l4+AHh5Xkr3nWNwQ1ogS/atl wGLILHCp3+E5sGbI4yg== X-Proofpoint-GUID: 7YhkJSKlOzEtG9gPE6KrYJ8aplpg6MRK X-Authority-Analysis: v=2.4 cv=SIpykuvH c=1 sm=1 tr=0 ts=6a16bf58 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=7EbbzXnA1mKNCY6AvRUA:9 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-27_01,2026-05-26_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 adultscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 malwarescore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605270095 The Qualcomm PDC (Power Domain Controller) hardware exposes multiple DRV (Driver) regions, each 0x10000 bytes in size, where each region serves a specific client like HLOS(High Level OS), TZ, HYP etc., in the system . Linux only needs access to the OS DRV region. Despite this, the driver was mapping up to 0x30000 bytes (three DRV regions) via a QCOM_PDC_SIZE clamp introduced as a workaround for old sm8150 DTs that described a too-small register window. Correspondingly, most platform DTS files described the PDC reg as 0x30000 in size. This series cleans up and refactors the PDC driver, motivated by the above. 2/4 has a dependency on https://lore.kernel.org/lkml/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com/ for a warning fix, otherwise "OF: invalid reg size, please fix DT" will be seen, however there is no functional dependency. Changes in v2: https://lore.kernel.org/lkml/20260410184124.1068210-1-mukesh.ojha@oss.qualcomm.com/ - Split the series into two: one for driver changes and the other for DTS corrections. DTS is sent here https://lore.kernel.org/lkml/20260527094333.2311731-1-mukesh.ojha@oss.qualcomm.com/ - Dropped the 4/35 from the series as current code looks more clean. - Added R-b tag and rebased the series. Mukesh Ojha (4): irqchip/qcom-pdc: Split __pdc_enable_intr() into per-version helpers irqchip/qcom-pdc: Tighten ioremap clamp to single DRV region size irqchip/qcom-pdc: Add PDC_VERSION() macro to describe version register fields irqchip/qcom-pdc: Use FIELD_GET() to extract bank index and bit position drivers/irqchip/qcom-pdc.c | 61 +++++++++++++++++++++++++------------- 1 file changed, 40 insertions(+), 21 deletions(-) -- 2.53.0